Registers In LTDC 0x40016800

RegisterOffset STM32F401 STM32F405 STM32F407 STM32F410 STM32F411 STM32F412 STM32F413 STM32F427 STM32F429 STM32F446 STM32F469
SSCR0x0008 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
BPCR0x000C ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
AWCR0x0010 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
TWCR0x0014 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
GCR0x0018 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
SRCR0x0024 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
BCCR0x002C ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
IER0x0034 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
ISR0x0038 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
ICR0x003C ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LIPCR0x0040 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
CPSR0x0044 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
CDSR0x0048 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_CR0x0084 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_WHPCR0x0088 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_WVPCR0x008C ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_CKCR0x0090 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_PFCR0x0094 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_CACR0x0098 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_DCCR0x009C ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_BFCR0x00A0 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_CFBAR0x00AC ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_CFBLR0x00B0 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_CFBLNR0x00B4 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER1_CLUTWR0x00C4 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_CR0x0104 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_WHPCR0x0108 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_WVPCR0x010C ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_CKCR0x0110 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_PFCR0x0114 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_CACR0x0118 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_DCCR0x011C ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_BFCR0x0120 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_CFBAR0x012C ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_CFBLR0x0130 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_CFBLNR0x0134 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔
LAYER2_CLUTWR0x0144 ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✘ ✔ ✘ ✔