Fields In MPU_MPU_CTRL (0xE000ED90, 0x0004)
Field
Offset
Width
STM32L4x2
STM32L4P5
STM32L4R5
STM32L4R9
STM32L4x1
STM32L4x2
STM32L4x3
STM32L4x5
STM32L4x6
ENABLE
0
1
✘
✔
✘
✘
✘
✘
✘
✘
✘
HFNMIENA
1
1
✘
✔
✘
✘
✘
✘
✘
✘
✘
PRIVDEFENA
2
1
✘
✔
✘
✘
✘
✘
✘
✘
✘