Module stm32wlxx_hal::pac::i2c1::cr2

Available on crate feature stm32wl5x_cm4 only.
Expand description

Control register 2

Structs

  • Control register 2
  • Register CR2 reader
  • Register CR2 writer

Enums

  • 10-bit addressing mode (master mode)
  • Automatic end mode (master mode)
  • 10-bit address header only read direction (master receiver mode)
  • NACK generation (slave mode)
  • Packet error checking byte
  • Transfer direction (master mode)
  • NBYTES reload mode
  • Start generation
  • Stop generation (master mode)

Type Aliases

  • Field ADD10 reader - 10-bit addressing mode (master mode)
  • Field ADD10 writer - 10-bit addressing mode (master mode)
  • Field AUTOEND reader - Automatic end mode (master mode)
  • Field AUTOEND writer - Automatic end mode (master mode)
  • Field HEAD10R reader - 10-bit address header only read direction (master receiver mode)
  • Field HEAD10R writer - 10-bit address header only read direction (master receiver mode)
  • Field NACK reader - NACK generation (slave mode)
  • Field NACK writer - NACK generation (slave mode)
  • Field NBYTES reader - Number of bytes
  • Field NBYTES writer - Number of bytes
  • Field PECBYTE reader - Packet error checking byte
  • Field PECBYTE writer - Packet error checking byte
  • Field RD_WRN reader - Transfer direction (master mode)
  • Field RD_WRN writer - Transfer direction (master mode)
  • Field RELOAD reader - NBYTES reload mode
  • Field RELOAD writer - NBYTES reload mode
  • Field SADD reader - Slave address bit (master mode)
  • Field SADD writer - Slave address bit (master mode)
  • Field START reader - Start generation
  • Field START writer - Start generation
  • Field STOP reader - Stop generation (master mode)
  • Field STOP writer - Stop generation (master mode)