Module stm32wlxx_hal::pac::lpuart::cr2

Available on crate feature stm32wl5x_cm4 only.

Control register 2

Structs

• CR2_SPEC
  Control register 2
• R
  Register CR2 reader
• W
  Register CR2 writer

Enums

• ADDM7_A
  7-bit Address Detection/4-bit Address Detection
• DATAINV_A
  Binary data inversion
• MSBFIRST_A
  Most significant bit first
• RXINV_A
  RX pin active level inversion
• STOP_A
  STOP bits
• SWAP_A
  Swap TX/RX pins
• TXINV_A
  TX pin active level inversion

Type Aliases

• ADDM7_R
  Field ADDM7 reader - 7-bit Address Detection/4-bit Address Detection
• ADDM7_W
  Field ADDM7 writer - 7-bit Address Detection/4-bit Address Detection
• ADD_R
  Field ADD reader - Address of the LPUART node
• ADD_W
  Field ADD writer - Address of the LPUART node
• DATAINV_R
  Field DATAINV reader - Binary data inversion
• DATAINV_W
  Field DATAINV writer - Binary data inversion
• MSBFIRST_R
  Field MSBFIRST reader - Most significant bit first
• MSBFIRST_W
  Field MSBFIRST writer - Most significant bit first
• RXINV_R
  Field RXINV reader - RX pin active level inversion
• RXINV_W
  Field RXINV writer - RX pin active level inversion
• STOP_R
  Field STOP reader - STOP bits
• STOP_W
  Field STOP writer - STOP bits
• SWAP_R
  Field SWAP reader - Swap TX/RX pins
• SWAP_W
  Field SWAP writer - Swap TX/RX pins
• TXINV_R
  Field TXINV reader - TX pin active level inversion
• TXINV_W
  Field TXINV writer - TX pin active level inversion