Enum stm32wlxx_hal::pac::pwr::pucrb::PU5_A
pub enum PU5_A {
Disabled = 0,
Enabled = 1,
}
Available on crate feature
stm32wl5x_cm4
only.Expand description
PU0
Value on reset: 0
Variants§
Disabled = 0
0: Disable pull-up on PB[y] when both APC bits are set in PWR control register 3 (PWR_CR3)
Enabled = 1
1: Enable pull-up on PB[y] when both APC bits are set in PWR control register 3 (PWR_CR3). The pull-up is not activated if the corresponding PB[y] bit is also set
Trait Implementations§
impl Copy for PU0_A
impl StructuralPartialEq for PU0_A
Auto Trait Implementations§
impl RefUnwindSafe for PU0_A
impl Send for PU0_A
impl Sync for PU0_A
impl Unpin for PU0_A
impl UnwindSafe for PU0_A
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more