Available on crate feature stm32wl5x_cm4 only.
Expand description

AHB2 peripheral clocks enable in Sleep modes register

Structs

  • AHB2 peripheral clocks enable in Sleep modes register
  • Register AHB2SMENR reader
  • Register AHB2SMENR writer

Type Aliases

  • Field GPIOASMEN reader - IO port A clock enable during CPU1 CSleep mode.
  • Field GPIOASMEN writer - IO port A clock enable during CPU1 CSleep mode.
  • Field GPIOBSMEN reader - IO port B clock enable during CPU1 CSleep mode.
  • Field GPIOBSMEN writer - IO port B clock enable during CPU1 CSleep mode.
  • Field GPIOCSMEN reader - IO port C clock enable during CPU1 CSleep mode.
  • Field GPIOCSMEN writer - IO port C clock enable during CPU1 CSleep mode.
  • Field GPIOHSMEN reader - IO port H clock enable during CPU1 CSleep mode.
  • Field GPIOHSMEN writer - IO port H clock enable during CPU1 CSleep mode.