Module stm32wlxx_hal::pac::rcc::c2ahb3smenr
Available on crate feature
stm32wl5x_cm4 only.Expand description
CPU2 AHB3 peripheral clocks enable in Sleep mode register [dual core device only]
Structs
- CPU2 AHB3 peripheral clocks enable in Sleep mode register [dual core device only]
- Register
C2AHB3SMENRreader - Register
C2AHB3SMENRwriter
Type Aliases
- Field
AESSMENreader - AES accelerator clock enable during CPU2 CSleep mode. - Field
AESSMENwriter - AES accelerator clock enable during CPU2 CSleep mode. - Field
FLASHSMENreader - Flash interface clock enable during CPU2 CSleep mode. - Field
FLASHSMENwriter - Flash interface clock enable during CPU2 CSleep mode. - Field
PKASMENreader - PKA accelerator clock enable during CPU2 CSleep mode. - Field
PKASMENwriter - PKA accelerator clock enable during CPU2 CSleep mode. - Field
RNGSMENreader - True RNG clock enable during CPU2 CSleep and CStop mode. - Field
RNGSMENwriter - True RNG clock enable during CPU2 CSleep and CStop mode. - Field
SRAM1SMENreader - SRAM1 interface clock enable during CPU2 CSleep mode. - Field
SRAM1SMENwriter - SRAM1 interface clock enable during CPU2 CSleep mode. - Field
SRAM2SMENreader - SRAM2 memory interface clock enable during CPU2 CSleep mode. - Field
SRAM2SMENwriter - SRAM2 memory interface clock enable during CPU2 CSleep mode.