Module stm32wlxx_hal::pac::rcc::c2apb2smenr
Available on crate feature
stm32wl5x_cm4 only.Expand description
CPU2 APB2 peripheral clocks enable in Sleep mode register [dual core device only]
Structs
- CPU2 APB2 peripheral clocks enable in Sleep mode register [dual core device only]
- Register
C2APB2SMENRreader - Register
C2APB2SMENRwriter
Type Aliases
- Field
ADCSMENreader - ADC clocks enable during CPU2 Csleep and CStop modes - Field
ADCSMENwriter - ADC clocks enable during CPU2 Csleep and CStop modes - Field
SPI1SMENreader - SPI1 clock enable during CPU2 CSleep mode - Field
SPI1SMENwriter - SPI1 clock enable during CPU2 CSleep mode - Field
TIM1SMENreader - TIM1 timer clock enable during CPU2 CSleep mode - Field
TIM1SMENwriter - TIM1 timer clock enable during CPU2 CSleep mode - Field
TIM16SMENreader - TIM16 timer clock enable during CPU2 CSleep mode - Field
TIM16SMENwriter - TIM16 timer clock enable during CPU2 CSleep mode - Field
TIM17SMENreader - TIM17 timer clock enable during CPU2 CSleep mode - Field
TIM17SMENwriter - TIM17 timer clock enable during CPU2 CSleep mode - Field
USART1SMENreader - USART1clock enable during CPU2 CSleep and CStop mode - Field
USART1SMENwriter - USART1clock enable during CPU2 CSleep and CStop mode