Module stm32wlxx_hal::pac::rcc::c2apb2smenr
Available on crate feature
stm32wl5x_cm4
only.Expand description
CPU2 APB2 peripheral clocks enable in Sleep mode register [dual core device only]
Structs
- CPU2 APB2 peripheral clocks enable in Sleep mode register [dual core device only]
- Register
C2APB2SMENR
reader - Register
C2APB2SMENR
writer
Type Aliases
- Field
ADCSMEN
reader - ADC clocks enable during CPU2 Csleep and CStop modes - Field
ADCSMEN
writer - ADC clocks enable during CPU2 Csleep and CStop modes - Field
SPI1SMEN
reader - SPI1 clock enable during CPU2 CSleep mode - Field
SPI1SMEN
writer - SPI1 clock enable during CPU2 CSleep mode - Field
TIM1SMEN
reader - TIM1 timer clock enable during CPU2 CSleep mode - Field
TIM1SMEN
writer - TIM1 timer clock enable during CPU2 CSleep mode - Field
TIM16SMEN
reader - TIM16 timer clock enable during CPU2 CSleep mode - Field
TIM16SMEN
writer - TIM16 timer clock enable during CPU2 CSleep mode - Field
TIM17SMEN
reader - TIM17 timer clock enable during CPU2 CSleep mode - Field
TIM17SMEN
writer - TIM17 timer clock enable during CPU2 CSleep mode - Field
USART1SMEN
reader - USART1clock enable during CPU2 CSleep and CStop mode - Field
USART1SMEN
writer - USART1clock enable during CPU2 CSleep and CStop mode