Module stm32wlxx_hal::pac::rcc::c2apb3smenr

Available on crate feature stm32wl5x_cm4 only.

CPU2 APB3 peripheral clock enable in Sleep mode register [dual core device only]

Structs

• C2APB3SMENR_SPEC
  CPU2 APB3 peripheral clock enable in Sleep mode register [dual core device only]
• R
  Register C2APB3SMENR reader
• W
  Register C2APB3SMENR writer

Type Aliases

• SUBGHZSPISMEN_R
  Field SUBGHZSPISMEN reader - sub-GHz radio SPI clock enable during CPU2 CSleep and CStop modes
• SUBGHZSPISMEN_W
  Field SUBGHZSPISMEN writer - sub-GHz radio SPI clock enable during CPU2 CSleep and CStop modes