Module stm32wlxx_hal::pac::rcc::cr
Available on crate feature
stm32wl5x_cm4
only.Expand description
Clock control register
Structs
- Clock control register
- Register
CR
reader - Register
CR
writer
Enums
- HSE32 Clock security system enable
- Enable HSE32 VDDTCXO output on package pin PB0-VDDTCXO.
- HSE32 clock enable
- HSE32 sysclk prescaler
- HSE32 clock ready flag
- HSI16 automatic start from Stop
- HSI16 kernel clock ready flag for peripherals requests.
- HSI16 always enable for peripheral kernel clocks.
- HSI16 clock enable
- HSI16 clock ready flag. (After wakeup from Stop this bit will be read 1 once the HSI16 is ready)
- MSI clock enable
- MSI clock PLL enable
- MSI clock ranges
- MSI clock ready flag (After reset this bit will be read 1 once the MSI is ready)
- MSI range control selection
- Main PLL enable
- Main PLL clock ready flag
Type Aliases
- Field
CSSON
reader - HSE32 Clock security system enable - Field
CSSON
writer - HSE32 Clock security system enable - Field
HSEBYPPWR
reader - Enable HSE32 VDDTCXO output on package pin PB0-VDDTCXO. - Field
HSEBYPPWR
writer - Enable HSE32 VDDTCXO output on package pin PB0-VDDTCXO. - Field
HSEON
reader - HSE32 clock enable - Field
HSEON
writer - HSE32 clock enable - Field
HSEPRE
reader - HSE32 sysclk prescaler - Field
HSEPRE
writer - HSE32 sysclk prescaler - Field
HSERDY
reader - HSE32 clock ready flag - Field
HSIASFS
reader - HSI16 automatic start from Stop - Field
HSIASFS
writer - HSI16 automatic start from Stop - Field
HSIKERDY
reader - HSI16 kernel clock ready flag for peripherals requests. - Field
HSIKERON
reader - HSI16 always enable for peripheral kernel clocks. - Field
HSIKERON
writer - HSI16 always enable for peripheral kernel clocks. - Field
HSION
reader - HSI16 clock enable - Field
HSION
writer - HSI16 clock enable - Field
HSIRDY
reader - HSI16 clock ready flag. (After wakeup from Stop this bit will be read 1 once the HSI16 is ready) - Field
MSION
reader - MSI clock enable - Field
MSION
writer - MSI clock enable - Field
MSIPLLEN
reader - MSI clock PLL enable - Field
MSIPLLEN
writer - MSI clock PLL enable - Field
MSIRANGE
reader - MSI clock ranges - Field
MSIRANGE
writer - MSI clock ranges - Field
MSIRDY
reader - MSI clock ready flag (After reset this bit will be read 1 once the MSI is ready) - Field
MSIRGSEL
reader - MSI range control selection - Field
MSIRGSEL
writer - MSI range control selection - Field
PLLON
reader - Main PLL enable - Field
PLLON
writer - Main PLL enable - Field
PLLRDY
reader - Main PLL clock ready flag