Enum stm32wlxx_hal::pac::adc::cfgr1::EXTSEL_A
#[repr(u8)]pub enum EXTSEL_A {
Tim1Trgo = 0,
Tim1Cc4 = 1,
Tim2Trgo = 2,
Tim2Ch4 = 3,
Tim2Ch3 = 5,
ExtiLine11 = 7,
}
Available on crate feature
stm32wl5x_cm4
only.Expand description
EXTSEL
Value on reset: 0
Variants§
Tim1Trgo = 0
0: Timer 1 TRGO event
Tim1Cc4 = 1
1: Timer 1 CC4 event
Tim2Trgo = 2
2: Timer 2 TRGO event
Tim2Ch4 = 3
3: Timer 2 CH4 event
Tim2Ch3 = 5
5: Timer 2 CH3 event
ExtiLine11 = 7
7: EXTI line 11 event
Trait Implementations§
impl Copy for EXTSEL_A
impl StructuralPartialEq for EXTSEL_A
Auto Trait Implementations§
impl RefUnwindSafe for EXTSEL_A
impl Send for EXTSEL_A
impl Sync for EXTSEL_A
impl Unpin for EXTSEL_A
impl UnwindSafe for EXTSEL_A
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more