#[repr(C)]
pub struct RegisterBlock {
Show 14 fields pub isr: Reg<ISR_SPEC>, pub ier: Reg<IER_SPEC>, pub cr: Reg<CR_SPEC>, pub cfgr1: Reg<CFGR1_SPEC>, pub cfgr2: Reg<CFGR2_SPEC>, pub smpr: Reg<SMPR_SPEC>, pub awd1tr: Reg<AWD1TR_SPEC>, pub awd2tr: Reg<AWD2TR_SPEC>, pub awd3tr: Reg<AWD3TR_SPEC>, pub dr: Reg<DR_SPEC>, pub awd2cr: Reg<AWD2CR_SPEC>, pub awd3cr: Reg<AWD3CR_SPEC>, pub calfact: Reg<CALFACT_SPEC>, pub ccr: Reg<CCR_SPEC>, /* private fields */
}
Available on crate feature stm32wl5x_cm4 only.
Expand description

Register block

Fields§

§isr: Reg<ISR_SPEC>

0x00 - ADC interrupt and status register

§ier: Reg<IER_SPEC>

0x04 - ADC interrupt enable register

§cr: Reg<CR_SPEC>

0x08 - ADC control register

§cfgr1: Reg<CFGR1_SPEC>

0x0c - ADC configuration register 1

§cfgr2: Reg<CFGR2_SPEC>

0x10 - ADC configuration register 2

§smpr: Reg<SMPR_SPEC>

0x14 - ADC sampling time register

§awd1tr: Reg<AWD1TR_SPEC>

0x20 - ADC watchdog threshold register

§awd2tr: Reg<AWD2TR_SPEC>

0x24 - ADC watchdog threshold register

§awd3tr: Reg<AWD3TR_SPEC>

0x2c - ADC watchdog threshold register

§dr: Reg<DR_SPEC>

0x40 - ADC data register

§awd2cr: Reg<AWD2CR_SPEC>

0xa0 - ADC Analog Watchdog 2 Configuration register

§awd3cr: Reg<AWD3CR_SPEC>

0xa4 - ADC Analog Watchdog 3 Configuration register

§calfact: Reg<CALFACT_SPEC>

0xb4 - ADC Calibration factor

§ccr: Reg<CCR_SPEC>

0x308 - ADC common configuration register

Implementations§

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impl RegisterBlock

pub fn chselr1(&self) -> &Reg<CHSELR1_SPEC>

0x28 - channel selection register

pub fn chselr0(&self) -> &Reg<CHSELR0_SPEC>

0x28 - channel selection register

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