Struct stm32wlxx_hal::pac::dbgmcu::c2apb1fzr1::C2APB1FZR1_SPEC

pub struct C2APB1FZR1_SPEC;

Available on crate feature stm32wl5x_cm4 only.

DBGMCU CPU2 APB1 Peripheral Freeze Register 1 [dual core device

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see c2apb1fzr1 module

Trait Implementations

impl Readable for C2APB1FZR1_SPEC

read() method returns c2apb1fzr1::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for C2APB1FZR1_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for C2APB1FZR1_SPEC

reset() method sets C2APB1FZR1 to value 0

fn reset_value() -> <C2APB1FZR1_SPEC as RegisterSpec>::Ux

Reset value of the register.

impl Writable for C2APB1FZR1_SPEC

write(|w| ..) method takes c2apb1fzr1::W writer structure

type Writer = W

Writer type argument to write, et al.