Enum stm32wlxx_hal::pac::dmamux::c3cr::DMAREQ_ID_A
#[repr(u8)]pub enum DMAREQ_ID_A {
Show 43 variants
None = 0,
Dmamux1ReqGen0 = 1,
Dmamux1ReqGen1 = 2,
Dmamux1ReqGen2 = 3,
Dmamux1ReqGen3 = 4,
Adc = 5,
DatOut1 = 6,
Spi1RxDma = 7,
Spi1TxDma = 8,
Spi2RxDma = 9,
Spi2TxDma = 10,
I2c1RxDma = 11,
I2c1TxDma = 12,
I2c2RxDma = 13,
I2c2TxDma = 14,
I2c3RxDma = 15,
I2c3TxDma = 16,
Usart1RxDma = 17,
Usart1TxDma = 18,
Usart2RxDma = 19,
Usart2TxDma = 20,
Lpuart1RxDma = 21,
Lpuart1TxDma = 22,
Tim1Ch1 = 23,
Tim1Ch2 = 24,
Tim1Ch3 = 25,
Tim1Ch4 = 26,
Tim1Up = 27,
Tim1Trig = 28,
Tim1Com = 29,
Tim2Ch1 = 30,
Tim2Ch2 = 31,
Tim2Ch3 = 32,
Tim2Ch4 = 33,
Tim2Up = 34,
Tim16Ch1 = 35,
Tim16Up = 36,
Tim17Ch1 = 37,
Tim17Up = 38,
AesIn = 39,
AesOut = 40,
SubghzspiRx = 41,
SubghzspiTx = 42,
}
stm32wl5x_cm4
only.Expand description
DMA request identification
Value on reset: 0
Variants§
None = 0
0: No signal selected as request input
Dmamux1ReqGen0 = 1
1: Signal dmamux1_req_gen0
selected as request input
Dmamux1ReqGen1 = 2
2: Signal dmamux1_req_gen1
selected as request input
Dmamux1ReqGen2 = 3
3: Signal dmamux1_req_gen2
selected as request input
Dmamux1ReqGen3 = 4
4: Signal dmamux1_req_gen3
selected as request input
Adc = 5
5: Signal adc1_dma
selected as request input
DatOut1 = 6
6: Signal dac_out1_dma
selected as request input
Spi1RxDma = 7
7: Signal spi1_rx_dma
selected as request input
Spi1TxDma = 8
8: Signal spi1_tx_dma
selected as request input
Spi2RxDma = 9
9: Signal spi2_rx_dma
selected as request input
Spi2TxDma = 10
10: Signal spi2_tx_dma
selected as request input
I2c1RxDma = 11
11: Signal i2c1_rx_dma
selected as request input
I2c1TxDma = 12
12: Signal i2c1_tx_dma
selected as request input
I2c2RxDma = 13
13: Signal i2c2_rx_dma
selected as request input
I2c2TxDma = 14
14: Signal i2c2_tx_dma
selected as request input
I2c3RxDma = 15
15: Signal i2c3_rx_dma
selected as request input
I2c3TxDma = 16
16: Signal i2c3_tx_dma
selected as request input
Usart1RxDma = 17
17: Signal usart1_rx_dma
selected as request input
Usart1TxDma = 18
18: Signal usart1_tx_dma
selected as request input
Usart2RxDma = 19
19: Signal usart2_rx_dma
selected as request input
Usart2TxDma = 20
20: Signal usart2_tx_dma
selected as request input
Lpuart1RxDma = 21
21: Signal lpuart1_rx_dma
selected as request input
Lpuart1TxDma = 22
22: Signal lpuart1_tx_dma
selected as request input
Tim1Ch1 = 23
23: Signal tim1_ch1
selected as request input
Tim1Ch2 = 24
24: Signal tim1_ch2
selected as request input
Tim1Ch3 = 25
25: Signal tim1_ch3
selected as request input
Tim1Ch4 = 26
26: Signal tim1_ch4
selected as request input
Tim1Up = 27
27: Signal tim1_up
selected as request input
Tim1Trig = 28
28: Signal tim1_trig
selected as request input
Tim1Com = 29
29: Signal tim1_com
selected as request input
Tim2Ch1 = 30
30: Signal tim2_ch1
selected as request input
Tim2Ch2 = 31
31: Signal tim2_ch2
selected as request input
Tim2Ch3 = 32
32: Signal tim2_ch3
selected as request input
Tim2Ch4 = 33
33: Signal tim2_ch4
selected as request input
Tim2Up = 34
34: Signal tim2_up
selected as request input
Tim16Ch1 = 35
35: Signal tim16_ch1
selected as request input
Tim16Up = 36
36: Signal tim16_up
selected as request input
Tim17Ch1 = 37
37: Signal tim17_ch1
selected as request input
Tim17Up = 38
38: Signal tim17_up
selected as request input
AesIn = 39
39: Signal aes_in
selected as request input
AesOut = 40
40: Signal aes_out
selected as request input
SubghzspiRx = 41
41: Signal subghzspi_rx
selected as request input
SubghzspiTx = 42
42: Signal subghzspi_tx
selected as request input
Trait Implementations§
§impl Clone for DMAREQ_ID_A
impl Clone for DMAREQ_ID_A
§fn clone(&self) -> DMAREQ_ID_A
fn clone(&self) -> DMAREQ_ID_A
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read more§impl Debug for DMAREQ_ID_A
impl Debug for DMAREQ_ID_A
§impl PartialEq for DMAREQ_ID_A
impl PartialEq for DMAREQ_ID_A
§fn eq(&self, other: &DMAREQ_ID_A) -> bool
fn eq(&self, other: &DMAREQ_ID_A) -> bool
self
and other
values to be equal, and is used
by ==
.