Struct stm32wlxx_hal::pac::exti::c1imr1::W

pub struct W(/* private fields */);

Available on crate feature stm32wl5x_cm4 only.

Register C1IMR1 writer

Implementations

impl W

pub fn im0(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 0>

Bit 0 - wakeup with interrupt Mask on event input

pub fn im1(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 1>

Bit 1 - wakeup with interrupt Mask on event input

pub fn im2(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 2>

Bit 2 - wakeup with interrupt Mask on event input

pub fn im3(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 3>

Bit 3 - wakeup with interrupt Mask on event input

pub fn im4(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 4>

Bit 4 - wakeup with interrupt Mask on event input

pub fn im5(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 5>

Bit 5 - wakeup with interrupt Mask on event input

pub fn im6(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 6>

Bit 6 - wakeup with interrupt Mask on event input

pub fn im7(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 7>

Bit 7 - wakeup with interrupt Mask on event input

pub fn im8(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 8>

Bit 8 - wakeup with interrupt Mask on event input

pub fn im9(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 9>

Bit 9 - wakeup with interrupt Mask on event input

pub fn im10(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 10>

Bit 10 - wakeup with interrupt Mask on event input

pub fn im11(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 11>

Bit 11 - wakeup with interrupt Mask on event input

pub fn im12(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 12>

Bit 12 - wakeup with interrupt Mask on event input

pub fn im13(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 13>

Bit 13 - wakeup with interrupt Mask on event input

pub fn im14(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 14>

Bit 14 - wakeup with interrupt Mask on event input

pub fn im15(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 15>

Bit 15 - wakeup with interrupt Mask on event input

pub fn im16(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 16>

Bit 16 - wakeup with interrupt Mask on event input

pub fn im17(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 17>

Bit 17 - wakeup with interrupt Mask on event input

pub fn im18(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 18>

Bit 18 - wakeup with interrupt Mask on event input

pub fn im19(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 19>

Bit 19 - wakeup with interrupt Mask on event input

pub fn im20(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 20>

Bit 20 - wakeup with interrupt Mask on event input

pub fn im21(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 21>

Bit 21 - wakeup with interrupt Mask on event input

pub fn im22(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 22>

Bit 22 - wakeup with interrupt Mask on event input

pub fn im23(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 23>

Bit 23 - wakeup with interrupt Mask on event input

pub fn im24(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 24>

Bit 24 - wakeup with interrupt Mask on event input

pub fn im25(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 25>

Bit 25 - wakeup with interrupt Mask on event input

pub fn im26(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 26>

Bit 26 - wakeup with interrupt Mask on event input

pub fn im27(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 27>

Bit 27 - wakeup with interrupt Mask on event input

pub fn im28(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 28>

Bit 28 - wakeup with interrupt Mask on event input

pub fn im29(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 29>

Bit 29 - wakeup with interrupt Mask on event input

pub fn im30(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 30>

Bit 30 - wakeup with interrupt Mask on event input

pub fn im31(&mut self) -> BitWriterRaw<'_, u32, C1IMR1_SPEC, IM0_A, BitM, 31>

Bit 31 - wakeup with interrupt Mask on event input

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<C1IMR1_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<C1IMR1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<C1IMR1_SPEC>> for W

fn from(writer: W<C1IMR1_SPEC>) -> W

Converts to this type from the input type.