Struct stm32wlxx_hal::pac::exti::c2emr1::W
pub struct W(/* private fields */);
stm32wl5x_cm4
only.Expand description
Register C2EMR1
writer
Implementations§
§impl W
impl W
pub fn em0(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 0>
pub fn em0(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 0>
Bit 0 - Wakeup with event generation Mask on Event input
pub fn em1(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 1>
pub fn em1(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 1>
Bit 1 - Wakeup with event generation Mask on Event input
pub fn em2(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 2>
pub fn em2(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 2>
Bit 2 - Wakeup with event generation Mask on Event input
pub fn em3(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 3>
pub fn em3(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 3>
Bit 3 - Wakeup with event generation Mask on Event input
pub fn em4(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 4>
pub fn em4(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 4>
Bit 4 - Wakeup with event generation Mask on Event input
pub fn em5(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 5>
pub fn em5(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 5>
Bit 5 - Wakeup with event generation Mask on Event input
pub fn em6(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 6>
pub fn em6(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 6>
Bit 6 - Wakeup with event generation Mask on Event input
pub fn em7(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 7>
pub fn em7(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 7>
Bit 7 - Wakeup with event generation Mask on Event input
pub fn em8(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 8>
pub fn em8(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 8>
Bit 8 - Wakeup with event generation Mask on Event input
pub fn em9(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 9>
pub fn em9(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 9>
Bit 9 - Wakeup with event generation Mask on Event input
pub fn em10(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 10>
pub fn em10(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 10>
Bit 10 - Wakeup with event generation Mask on Event input
pub fn em11(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 11>
pub fn em11(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 11>
Bit 11 - Wakeup with event generation Mask on Event input
pub fn em12(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 12>
pub fn em12(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 12>
Bit 12 - Wakeup with event generation Mask on Event input
pub fn em13(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 13>
pub fn em13(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 13>
Bit 13 - Wakeup with event generation Mask on Event input
pub fn em14(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 14>
pub fn em14(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 14>
Bit 14 - Wakeup with event generation Mask on Event input
pub fn em15(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 15>
pub fn em15(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 15>
Bit 15 - Wakeup with event generation Mask on Event input
pub fn em17(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 17>
pub fn em17(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 17>
Bit 17 - Wakeup with event generation Mask on Event input
pub fn em18(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 18>
pub fn em18(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 18>
Bit 18 - Wakeup with event generation Mask on Event input
pub fn em19(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 19>
pub fn em19(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 19>
Bit 19 - Wakeup with event generation Mask on Event input
pub fn em20(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 20>
pub fn em20(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 20>
Bit 20 - Wakeup with event generation Mask on Event input
pub fn em21(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 21>
pub fn em21(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 21>
Bit 21 - Wakeup with event generation Mask on Event input
pub fn em22(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 22>
pub fn em22(&mut self) -> BitWriterRaw<'_, u32, C2EMR1_SPEC, EM0_A, BitM, 22>
Bit 22 - Wakeup with event generation Mask on Event input
Methods from Deref<Target = W<C2EMR1_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.