Struct stm32wlxx_hal::pac::exti::rtsr1::W
pub struct W(/* private fields */);
stm32wl5x_cm4
only.Expand description
Register RTSR1
writer
Implementations§
§impl W
impl W
pub fn rt21(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 21>
pub fn rt21(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 21>
Bit 21 - Rising trigger event configuration bit of Configurable Event input
pub fn rt22(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 22>
pub fn rt22(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 22>
Bit 22 - Rising trigger event configuration bit of Configurable Event input
pub fn rt0(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 0>
pub fn rt0(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 0>
Bit 0 - Rising trigger event configuration bit of Configurable Event input
pub fn rt1(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 1>
pub fn rt1(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 1>
Bit 1 - Rising trigger event configuration bit of Configurable Event input
pub fn rt2(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 2>
pub fn rt2(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 2>
Bit 2 - Rising trigger event configuration bit of Configurable Event input
pub fn rt3(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 3>
pub fn rt3(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 3>
Bit 3 - Rising trigger event configuration bit of Configurable Event input
pub fn rt4(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 4>
pub fn rt4(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 4>
Bit 4 - Rising trigger event configuration bit of Configurable Event input
pub fn rt5(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 5>
pub fn rt5(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 5>
Bit 5 - Rising trigger event configuration bit of Configurable Event input
pub fn rt6(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 6>
pub fn rt6(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 6>
Bit 6 - Rising trigger event configuration bit of Configurable Event input
pub fn rt7(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 7>
pub fn rt7(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 7>
Bit 7 - Rising trigger event configuration bit of Configurable Event input
pub fn rt8(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 8>
pub fn rt8(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 8>
Bit 8 - Rising trigger event configuration bit of Configurable Event input
pub fn rt9(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 9>
pub fn rt9(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 9>
Bit 9 - Rising trigger event configuration bit of Configurable Event input
pub fn rt10(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 10>
pub fn rt10(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 10>
Bit 10 - Rising trigger event configuration bit of Configurable Event input
pub fn rt11(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 11>
pub fn rt11(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 11>
Bit 11 - Rising trigger event configuration bit of Configurable Event input
pub fn rt12(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 12>
pub fn rt12(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 12>
Bit 12 - Rising trigger event configuration bit of Configurable Event input
pub fn rt13(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 13>
pub fn rt13(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 13>
Bit 13 - Rising trigger event configuration bit of Configurable Event input
pub fn rt14(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 14>
pub fn rt14(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 14>
Bit 14 - Rising trigger event configuration bit of Configurable Event input
pub fn rt15(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 15>
pub fn rt15(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 15>
Bit 15 - Rising trigger event configuration bit of Configurable Event input
pub fn rt16(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 16>
pub fn rt16(&mut self) -> BitWriterRaw<'_, u32, RTSR1_SPEC, RT0_A, BitM, 16>
Bit 16 - Rising trigger event configuration bit of Configurable Event input
Methods from Deref<Target = W<RTSR1_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.