#[repr(C)]
pub struct RegisterBlock {
Show 16 fields pub rtsr1: Reg<RTSR1_SPEC>, pub ftsr1: Reg<FTSR1_SPEC>, pub swier1: Reg<SWIER1_SPEC>, pub pr1: Reg<PR1_SPEC>, pub rtsr2: Reg<RTSR2_SPEC>, pub ftsr2: Reg<FTSR2_SPEC>, pub swier2: Reg<SWIER2_SPEC>, pub pr2: Reg<PR2_SPEC>, pub c1imr1: Reg<C1IMR1_SPEC>, pub c1emr1: Reg<C1EMR1_SPEC>, pub c1imr2: Reg<C1IMR2_SPEC>, pub c1emr2: Reg<C1EMR2_SPEC>, pub c2imr1: Reg<C2IMR1_SPEC>, pub c2emr1: Reg<C2EMR1_SPEC>, pub c2imr2: Reg<C2IMR2_SPEC>, pub c2emr2: Reg<C2EMR2_SPEC>, /* private fields */
}
Available on crate feature stm32wl5x_cm4 only.
Expand description

Register block

Fields§

§rtsr1: Reg<RTSR1_SPEC>

0x00 - rising trigger selection register

§ftsr1: Reg<FTSR1_SPEC>

0x04 - falling trigger selection register

§swier1: Reg<SWIER1_SPEC>

0x08 - software interrupt event register

§pr1: Reg<PR1_SPEC>

0x0c - EXTI pending register

§rtsr2: Reg<RTSR2_SPEC>

0x20 - rising trigger selection register

§ftsr2: Reg<FTSR2_SPEC>

0x24 - falling trigger selection register

§swier2: Reg<SWIER2_SPEC>

0x28 - software interrupt event register

§pr2: Reg<PR2_SPEC>

0x2c - pending register

§c1imr1: Reg<C1IMR1_SPEC>

0x80 - interrupt mask register

§c1emr1: Reg<C1EMR1_SPEC>

0x84 - event mask register

§c1imr2: Reg<C1IMR2_SPEC>

0x90 - wakeup with interrupt mask register

§c1emr2: Reg<C1EMR2_SPEC>

0x94 - wakeup with event mask register

§c2imr1: Reg<C2IMR1_SPEC>

0xc0 - interrupt mask register

§c2emr1: Reg<C2EMR1_SPEC>

0xc4 - event mask register

§c2imr2: Reg<C2IMR2_SPEC>

0xd0 - wakeup with interrupt mask register

§c2emr2: Reg<C2EMR2_SPEC>

0xd4 - wakeup with event mask register

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