Struct stm32wlxx_hal::pac::flash::acr::W
pub struct W(/* private fields */);
Available on crate feature
stm32wl5x_cm4
only.Expand description
Register ACR
writer
Implementations§
§impl W
impl W
pub fn latency(
&mut self
) -> FieldWriterRaw<'_, u32, ACR_SPEC, u8, LATENCY_A, Unsafe, 3, 0>
pub fn latency( &mut self ) -> FieldWriterRaw<'_, u32, ACR_SPEC, u8, LATENCY_A, Unsafe, 3, 0>
Bits 0:2 - Latency
pub fn prften(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, PRFTEN_A, BitM, 8>
pub fn prften(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, PRFTEN_A, BitM, 8>
Bit 8 - Prefetch enable
pub fn icen(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, ICEN_A, BitM, 9>
pub fn icen(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, ICEN_A, BitM, 9>
Bit 9 - Instruction cache enable
pub fn dcen(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, DCEN_A, BitM, 10>
pub fn dcen(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, DCEN_A, BitM, 10>
Bit 10 - Data cache enable
pub fn icrst(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, ICRST_A, BitM, 11>
pub fn icrst(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, ICRST_A, BitM, 11>
Bit 11 - Instruction cache reset
pub fn dcrst(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, DCRST_A, BitM, 12>
pub fn dcrst(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, DCRST_A, BitM, 12>
Bit 12 - Data cache reset
pub fn pes(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, PES_A, BitM, 15>
pub fn pes(&mut self) -> BitWriterRaw<'_, u32, ACR_SPEC, PES_A, BitM, 15>
Bit 15 - CPU1 programm erase suspend request
Methods from Deref<Target = W<ACR_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Trait Implementations§
Auto Trait Implementations§
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more