Struct stm32wlxx_hal::pac::gpiob::lckr::W
pub struct W(/* private fields */);
Available on crate feature
stm32wl5x_cm4
only.Expand description
Register LCKR
writer
Implementations§
§impl W
impl W
pub fn lckk(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCKK_A, BitM, 16>
pub fn lckk(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCKK_A, BitM, 16>
Bit 16 - Port x lock bit y (y= 0..15)
pub fn lck15(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 15>
pub fn lck15(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 15>
Bit 15 - Port x lock bit y (y= 0..15)
pub fn lck14(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 14>
pub fn lck14(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 14>
Bit 14 - Port x lock bit y (y= 0..15)
pub fn lck13(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 13>
pub fn lck13(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 13>
Bit 13 - Port x lock bit y (y= 0..15)
pub fn lck12(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 12>
pub fn lck12(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 12>
Bit 12 - Port x lock bit y (y= 0..15)
pub fn lck11(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 11>
pub fn lck11(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 11>
Bit 11 - Port x lock bit y (y= 0..15)
pub fn lck10(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 10>
pub fn lck10(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 10>
Bit 10 - Port x lock bit y (y= 0..15)
pub fn lck9(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 9>
pub fn lck9(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 9>
Bit 9 - Port x lock bit y (y= 0..15)
pub fn lck8(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 8>
pub fn lck8(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 8>
Bit 8 - Port x lock bit y (y= 0..15)
pub fn lck7(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 7>
pub fn lck7(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 7>
Bit 7 - Port x lock bit y (y= 0..15)
pub fn lck6(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 6>
pub fn lck6(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 6>
Bit 6 - Port x lock bit y (y= 0..15)
pub fn lck5(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 5>
pub fn lck5(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 5>
Bit 5 - Port x lock bit y (y= 0..15)
pub fn lck4(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 4>
pub fn lck4(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 4>
Bit 4 - Port x lock bit y (y= 0..15)
pub fn lck3(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 3>
pub fn lck3(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 3>
Bit 3 - Port x lock bit y (y= 0..15)
pub fn lck2(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 2>
pub fn lck2(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 2>
Bit 2 - Port x lock bit y (y= 0..15)
pub fn lck1(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 1>
pub fn lck1(&mut self) -> BitWriterRaw<'_, u32, LCKR_SPEC, LCK0_A, BitM, 1>
Bit 1 - Port x lock bit y (y= 0..15)
Methods from Deref<Target = W<LCKR_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Trait Implementations§
Auto Trait Implementations§
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more