Struct stm32wlxx_hal::pac::gpiob::moder::W
pub struct W(/* private fields */);
stm32wl5x_cm4
only.Expand description
Register MODER
writer
Implementations§
§impl W
impl W
pub fn moder15(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 30>
pub fn moder15( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 30>
Bits 30:31 - Port x configuration bits (y = 0..15)
pub fn moder14(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 28>
pub fn moder14( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 28>
Bits 28:29 - Port x configuration bits (y = 0..15)
pub fn moder13(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 26>
pub fn moder13( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 26>
Bits 26:27 - Port x configuration bits (y = 0..15)
pub fn moder12(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 24>
pub fn moder12( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 24>
Bits 24:25 - Port x configuration bits (y = 0..15)
pub fn moder11(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 22>
pub fn moder11( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 22>
Bits 22:23 - Port x configuration bits (y = 0..15)
pub fn moder10(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 20>
pub fn moder10( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 20>
Bits 20:21 - Port x configuration bits (y = 0..15)
pub fn moder9(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 18>
pub fn moder9( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 18>
Bits 18:19 - Port x configuration bits (y = 0..15)
pub fn moder8(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 16>
pub fn moder8( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 16>
Bits 16:17 - Port x configuration bits (y = 0..15)
pub fn moder7(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 14>
pub fn moder7( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 14>
Bits 14:15 - Port x configuration bits (y = 0..15)
pub fn moder6(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 12>
pub fn moder6( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 12>
Bits 12:13 - Port x configuration bits (y = 0..15)
pub fn moder5(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 10>
pub fn moder5( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 10>
Bits 10:11 - Port x configuration bits (y = 0..15)
pub fn moder4(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 8>
pub fn moder4( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 8>
Bits 8:9 - Port x configuration bits (y = 0..15)
pub fn moder3(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 6>
pub fn moder3( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 6>
Bits 6:7 - Port x configuration bits (y = 0..15)
pub fn moder2(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 4>
pub fn moder2( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 4>
Bits 4:5 - Port x configuration bits (y = 0..15)
pub fn moder1(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 2>
pub fn moder1( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 2>
Bits 2:3 - Port x configuration bits (y = 0..15)
pub fn moder0(
&mut self
) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 0>
pub fn moder0( &mut self ) -> FieldWriterRaw<'_, u32, MODER_SPEC, u8, MODER0_A, Safe, 2, 0>
Bits 0:1 - Port x configuration bits (y = 0..15)
Methods from Deref<Target = W<MODER_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.