Struct stm32wlxx_hal::pac::i2c1::cr1::W
pub struct W(/* private fields */);
Available on crate feature
stm32wl5x_cm4
only.Expand description
Register CR1
writer
Implementations§
§impl W
impl W
pub fn txie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, TXIE_A, BitM, 1>
pub fn txie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, TXIE_A, BitM, 1>
Bit 1 - TX Interrupt enable
pub fn rxie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, RXIE_A, BitM, 2>
pub fn rxie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, RXIE_A, BitM, 2>
Bit 2 - RX Interrupt enable
pub fn addrie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, ADDRIE_A, BitM, 3>
pub fn addrie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, ADDRIE_A, BitM, 3>
Bit 3 - Address match interrupt enable (slave only)
pub fn nackie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, NACKIE_A, BitM, 4>
pub fn nackie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, NACKIE_A, BitM, 4>
Bit 4 - Not acknowledge received interrupt enable
pub fn stopie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, STOPIE_A, BitM, 5>
pub fn stopie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, STOPIE_A, BitM, 5>
Bit 5 - STOP detection Interrupt enable
pub fn tcie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, TCIE_A, BitM, 6>
pub fn tcie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, TCIE_A, BitM, 6>
Bit 6 - Transfer Complete interrupt enable
pub fn errie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, ERRIE_A, BitM, 7>
pub fn errie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, ERRIE_A, BitM, 7>
Bit 7 - Error interrupts enable
pub fn dnf(
&mut self
) -> FieldWriterRaw<'_, u32, CR1_SPEC, u8, DNF_A, Safe, 4, 8>
pub fn dnf( &mut self ) -> FieldWriterRaw<'_, u32, CR1_SPEC, u8, DNF_A, Safe, 4, 8>
Bits 8:11 - Digital noise filter
pub fn anfoff(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, ANFOFF_A, BitM, 12>
pub fn anfoff(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, ANFOFF_A, BitM, 12>
Bit 12 - Analog noise filter OFF
pub fn txdmaen(
&mut self
) -> BitWriterRaw<'_, u32, CR1_SPEC, TXDMAEN_A, BitM, 14>
pub fn txdmaen( &mut self ) -> BitWriterRaw<'_, u32, CR1_SPEC, TXDMAEN_A, BitM, 14>
Bit 14 - DMA transmission requests enable
pub fn rxdmaen(
&mut self
) -> BitWriterRaw<'_, u32, CR1_SPEC, RXDMAEN_A, BitM, 15>
pub fn rxdmaen( &mut self ) -> BitWriterRaw<'_, u32, CR1_SPEC, RXDMAEN_A, BitM, 15>
Bit 15 - DMA reception requests enable
pub fn sbc(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, SBC_A, BitM, 16>
pub fn sbc(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, SBC_A, BitM, 16>
Bit 16 - Slave byte control
pub fn nostretch(
&mut self
) -> BitWriterRaw<'_, u32, CR1_SPEC, NOSTRETCH_A, BitM, 17>
pub fn nostretch( &mut self ) -> BitWriterRaw<'_, u32, CR1_SPEC, NOSTRETCH_A, BitM, 17>
Bit 17 - Clock stretching disable
pub fn wupen(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, WUPEN_A, BitM, 18>
pub fn wupen(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, WUPEN_A, BitM, 18>
Bit 18 - Wakeup from STOP enable
pub fn gcen(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, GCEN_A, BitM, 19>
pub fn gcen(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, GCEN_A, BitM, 19>
Bit 19 - General call enable
pub fn smbhen(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, SMBHEN_A, BitM, 20>
pub fn smbhen(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, SMBHEN_A, BitM, 20>
Bit 20 - SMBus Host address enable
pub fn smbden(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, SMBDEN_A, BitM, 21>
pub fn smbden(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, SMBDEN_A, BitM, 21>
Bit 21 - SMBus Device Default address enable
Methods from Deref<Target = W<CR1_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Trait Implementations§
Auto Trait Implementations§
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more