Struct stm32wlxx_hal::pac::i2c1::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub cr1: Reg<CR1_SPEC>,
    pub cr2: Reg<CR2_SPEC>,
    pub oar1: Reg<OAR1_SPEC>,
    pub oar2: Reg<OAR2_SPEC>,
    pub timingr: Reg<TIMINGR_SPEC>,
    pub timeoutr: Reg<TIMEOUTR_SPEC>,
    pub isr: Reg<ISR_SPEC>,
    pub icr: Reg<ICR_SPEC>,
    pub pecr: Reg<PECR_SPEC>,
    pub rxdr: Reg<RXDR_SPEC>,
    pub txdr: Reg<TXDR_SPEC>,
}

Available on crate feature stm32wl5x_cm4 only.

Register block

Fields

cr1: Reg<CR1_SPEC>

0x00 - Control register 1

cr2: Reg<CR2_SPEC>

0x04 - Control register 2

oar1: Reg<OAR1_SPEC>

0x08 - Own address register 1

oar2: Reg<OAR2_SPEC>

0x0c - Own address register 2

timingr: Reg<TIMINGR_SPEC>

0x10 - Timing register

timeoutr: Reg<TIMEOUTR_SPEC>

0x14 - Status register 1

isr: Reg<ISR_SPEC>

0x18 - Interrupt and Status register

icr: Reg<ICR_SPEC>

0x1c - Interrupt clear register

pecr: Reg<PECR_SPEC>

0x20 - PEC register

rxdr: Reg<RXDR_SPEC>

0x24 - Receive data register

txdr: Reg<TXDR_SPEC>

0x28 - Transmit data register