Available on crate feature stm32wl5x_cm4 only.
Expand description

AHB3 peripheral clocks enable in Sleep and Stop modes register

Structs

  • AHB3 peripheral clocks enable in Sleep and Stop modes register
  • Register AHB3SMENR reader
  • Register AHB3SMENR writer

Type Aliases

  • Field AESSMEN reader - AES accelerator clock enable during CPU1 CSleep mode.
  • Field AESSMEN writer - AES accelerator clock enable during CPU1 CSleep mode.
  • Field FLASHSMEN reader - Flash interface clock enable during CPU1 CSleep mode.
  • Field FLASHSMEN writer - Flash interface clock enable during CPU1 CSleep mode.
  • Field PKASMEN reader - PKA accelerator clock enable during CPU1 CSleep mode.
  • Field PKASMEN writer - PKA accelerator clock enable during CPU1 CSleep mode.
  • Field RNGSMEN reader - True RNG clocks enable during CPU1 Csleep and CStop modes
  • Field RNGSMEN writer - True RNG clocks enable during CPU1 Csleep and CStop modes
  • Field SRAM1SMEN reader - SRAM1 interface clock enable during CPU1 CSleep mode.
  • Field SRAM1SMEN writer - SRAM1 interface clock enable during CPU1 CSleep mode.
  • Field SRAM2SMEN reader - SRAM2 memory interface clock enable during CPU1 CSleep mode
  • Field SRAM2SMEN writer - SRAM2 memory interface clock enable during CPU1 CSleep mode