Struct stm32wlxx_hal::pac::rcc::ahb3smenr::W

pub struct W(/* private fields */);

Available on crate feature stm32wl5x_cm4 only.

Register AHB3SMENR writer

Implementations

impl W

pub fn flashsmen( &mut self ) -> BitWriterRaw<'_, u32, AHB3SMENR_SPEC, bool, BitM, 25>

Bit 25 - Flash interface clock enable during CPU1 CSleep mode.

pub fn sram2smen( &mut self ) -> BitWriterRaw<'_, u32, AHB3SMENR_SPEC, bool, BitM, 24>

Bit 24 - SRAM2 memory interface clock enable during CPU1 CSleep mode

pub fn sram1smen( &mut self ) -> BitWriterRaw<'_, u32, AHB3SMENR_SPEC, bool, BitM, 23>

Bit 23 - SRAM1 interface clock enable during CPU1 CSleep mode.

pub fn rngsmen( &mut self ) -> BitWriterRaw<'_, u32, AHB3SMENR_SPEC, bool, BitM, 18>

Bit 18 - True RNG clocks enable during CPU1 Csleep and CStop modes

pub fn aessmen( &mut self ) -> BitWriterRaw<'_, u32, AHB3SMENR_SPEC, bool, BitM, 17>

Bit 17 - AES accelerator clock enable during CPU1 CSleep mode.

pub fn pkasmen( &mut self ) -> BitWriterRaw<'_, u32, AHB3SMENR_SPEC, bool, BitM, 16>

Bit 16 - PKA accelerator clock enable during CPU1 CSleep mode.

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<AHB3SMENR_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<AHB3SMENR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<AHB3SMENR_SPEC>> for W

fn from(writer: W<AHB3SMENR_SPEC>) -> W

Converts to this type from the input type.