Struct stm32wlxx_hal::pac::rcc::apb1smenr1::R

pub struct R(/* private fields */);

Available on crate feature stm32wl5x_cm4 only.

Register APB1SMENR1 reader

Implementations

impl R

pub fn lptim1smen(&self) -> BitReaderRaw<TIM2SMEN_A>

Bit 31 - Low power timer 1 clock enable during CPU1 Csleep and CStop mode

pub fn dacsmen(&self) -> BitReaderRaw<TIM2SMEN_A>

Bit 29 - DAC1 clock enable during CPU1 CSleep mode.

pub fn i2c3smen(&self) -> BitReaderRaw<TIM2SMEN_A>

Bit 23 - I2C3 clock enable during CPU1 Csleep and CStop modes

pub fn i2c2smen(&self) -> BitReaderRaw<TIM2SMEN_A>

Bit 22 - I2C2 clock enable during CPU1 Csleep and CStop modes

pub fn i2c1smen(&self) -> BitReaderRaw<TIM2SMEN_A>

Bit 21 - I2C1 clock enable during CPU1 Csleep and CStop modes

pub fn usart2smen(&self) -> BitReaderRaw<TIM2SMEN_A>

Bit 17 - USART2 clock enable during CPU1 CSleep mode.

pub fn spi2s2smen(&self) -> BitReaderRaw<TIM2SMEN_A>

Bit 14 - SPI2S2 clock enable during CPU1 CSleep mode.

pub fn wwdgsmen(&self) -> BitReaderRaw<TIM2SMEN_A>

Bit 11 - Window watchdog clocks enable during CPU1 CSleep mode.

pub fn rtcapbsmen(&self) -> BitReaderRaw<TIM2SMEN_A>

Bit 10 - RTC bus clock enable during CPU1 CSleep mode.

pub fn tim2smen(&self) -> BitReaderRaw<TIM2SMEN_A>

Bit 0 - TIM2 timer clock enable during CPU1 CSleep mode.

Methods from Deref<Target = R<APB1SMENR1_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<APB1SMENR1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<APB1SMENR1_SPEC>> for R

fn from(reader: R<APB1SMENR1_SPEC>) -> R

Converts to this type from the input type.