Enum stm32wlxx_hal::pac::rcc::ccipr::RNGSEL_A
#[repr(u8)]pub enum RNGSEL_A {
Pllq = 0,
Lsi = 1,
Lse = 2,
Msi = 3,
}
Available on crate feature
stm32wl5x_cm4
only.Expand description
RNG clock source selection
Value on reset: 0
Variants§
Pllq = 0
0: PLLQ clock selected
Lsi = 1
1: LSI clock selected
Lse = 2
2: LSE clock selected
Msi = 3
3: MSI clock selected
Trait Implementations§
impl Copy for RNGSEL_A
impl StructuralPartialEq for RNGSEL_A
Auto Trait Implementations§
impl RefUnwindSafe for RNGSEL_A
impl Send for RNGSEL_A
impl Sync for RNGSEL_A
impl Unpin for RNGSEL_A
impl UnwindSafe for RNGSEL_A
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more