Enum stm32wlxx_hal::pac::rcc::cfgr::PPRE2_A
#[repr(u8)]pub enum PPRE2_A {
Div1 = 0,
Div2 = 4,
Div4 = 5,
Div8 = 6,
Div16 = 7,
}
Available on crate feature
stm32wl5x_cm4
only.Expand description
PCLK2 high-speed prescaler (APB2)
Value on reset: 0
Variants§
Div1 = 0
0: HCLK not divided
Div2 = 4
4: HCLK divided by 2
Div4 = 5
5: HCLK divided by 4
Div8 = 6
6: HCLK divided by 8
Div16 = 7
7: HCLK divided by 16
Trait Implementations§
impl Copy for PPRE2_A
impl StructuralPartialEq for PPRE2_A
Auto Trait Implementations§
impl RefUnwindSafe for PPRE2_A
impl Send for PPRE2_A
impl Sync for PPRE2_A
impl Unpin for PPRE2_A
impl UnwindSafe for PPRE2_A
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more