Enum stm32wlxx_hal::pac::tim1::ccr5::GC5C1_A
pub enum GC5C1_A {
Disabled = 0,
Enabled = 1,
}
Available on crate feature
stm32wl5x_cm4
only.Expand description
Group Channel 5 and Channel 1
Value on reset: 0
Variants§
Disabled = 0
0: No effect of OC5REF on OC1REFC
Enabled = 1
1: OC1REFC is the logical AND of OC1REFC and OC5REF
Trait Implementations§
impl Copy for GC5C1_A
impl StructuralPartialEq for GC5C1_A
Auto Trait Implementations§
impl RefUnwindSafe for GC5C1_A
impl Send for GC5C1_A
impl Sync for GC5C1_A
impl Unpin for GC5C1_A
impl UnwindSafe for GC5C1_A
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more