Module stm32wlxx_hal::pac::tim1::cr1

Available on crate feature stm32wl5x_cm4 only.

control register 1

Structs

• CR1_SPEC
  control register 1
• R
  Register CR1 reader
• W
  Register CR1 writer

Enums

• ARPE_A
  Auto-reload preload enable
• CEN_A
  Counter enable
• CKD_A
  Clock division
• CMS_A
  Center-aligned mode selection
• DIR_A
  Direction
• OPM_A
  One pulse mode
• UDIS_A
  Update disable
• UIFREMAP_A
  UIF status bit remapping
• URS_A
  Update request source

Type Aliases

• ARPE_R
  Field ARPE reader - Auto-reload preload enable
• ARPE_W
  Field ARPE writer - Auto-reload preload enable
• CEN_R
  Field CEN reader - Counter enable
• CEN_W
  Field CEN writer - Counter enable
• CKD_R
  Field CKD reader - Clock division
• CKD_W
  Field CKD writer - Clock division
• CMS_R
  Field CMS reader - Center-aligned mode selection
• CMS_W
  Field CMS writer - Center-aligned mode selection
• DIR_R
  Field DIR reader - Direction
• DIR_W
  Field DIR writer - Direction
• OPM_R
  Field OPM reader - One pulse mode
• OPM_W
  Field OPM writer - One pulse mode
• UDIS_R
  Field UDIS reader - Update disable
• UDIS_W
  Field UDIS writer - Update disable
• UIFREMAP_R
  Field UIFREMAP reader - UIF status bit remapping
• UIFREMAP_W
  Field UIFREMAP writer - UIF status bit remapping
• URS_R
  Field URS reader - Update request source
• URS_W
  Field URS writer - Update request source