Enum stm32wlxx_hal::pac::tim1::cr2::MMS_A
#[repr(u8)]pub enum MMS_A {
Reset = 0,
Enable = 1,
Update = 2,
ComparePulse = 3,
CompareOc1 = 4,
CompareOc2 = 5,
CompareOc3 = 6,
CompareOc4 = 7,
}
Available on crate feature
stm32wl5x_cm4
only.Expand description
Master mode selection
Value on reset: 0
Variants§
Reset = 0
0: The UG bit from the TIMx_EGR register is used as trigger output
Enable = 1
1: The counter enable signal, CNT_EN, is used as trigger output
Update = 2
2: The update event is selected as trigger output
ComparePulse = 3
3: The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred
CompareOc1 = 4
4: OC1REF signal is used as trigger output
CompareOc2 = 5
5: OC2REF signal is used as trigger output
CompareOc3 = 6
6: OC3REF signal is used as trigger output
CompareOc4 = 7
7: OC4REF signal is used as trigger output
Trait Implementations§
impl Copy for MMS_A
impl StructuralPartialEq for MMS_A
Auto Trait Implementations§
impl RefUnwindSafe for MMS_A
impl Send for MMS_A
impl Sync for MMS_A
impl Unpin for MMS_A
impl UnwindSafe for MMS_A
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more