Struct stm32wlxx_hal::pac::tim1::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
Show 25 fields
    pub cr1: Reg<CR1_SPEC>,
    pub cr2: Reg<CR2_SPEC>,
    pub smcr: Reg<SMCR_SPEC>,
    pub dier: Reg<DIER_SPEC>,
    pub sr: Reg<SR_SPEC>,
    pub egr: Reg<EGR_SPEC>,
    pub ccer: Reg<CCER_SPEC>,
    pub cnt: Reg<CNT_SPEC>,
    pub psc: Reg<PSC_SPEC>,
    pub arr: Reg<ARR_SPEC>,
    pub rcr: Reg<RCR_SPEC>,
    pub ccr1: Reg<CCR1_SPEC>,
    pub ccr2: Reg<CCR2_SPEC>,
    pub ccr3: Reg<CCR3_SPEC>,
    pub ccr4: Reg<CCR4_SPEC>,
    pub bdtr: Reg<BDTR_SPEC>,
    pub dcr: Reg<DCR_SPEC>,
    pub dmar: Reg<DMAR_SPEC>,
    pub or1: Reg<OR1_SPEC>,
    pub ccmr3_output: Reg<CCMR3_OUTPUT_SPEC>,
    pub ccr5: Reg<CCR5_SPEC>,
    pub ccr6: Reg<CCR6_SPEC>,
    pub af1: Reg<AF1_SPEC>,
    pub af2: Reg<AF2_SPEC>,
    pub tisel: Reg<TISEL_SPEC>,
    /* private fields */

}
Available on crate feature stm32wl5x_cm4 only.
Expand description

Register block

Fields§

§cr1: Reg<CR1_SPEC>

0x00 - control register 1

§cr2: Reg<CR2_SPEC>

0x04 - control register 2

§smcr: Reg<SMCR_SPEC>

0x08 - slave mode control register

§dier: Reg<DIER_SPEC>

0x0c - DMA/interrupt enable register

§sr: Reg<SR_SPEC>

0x10 - status register

§egr: Reg<EGR_SPEC>

0x14 - event generation register

§ccer: Reg<CCER_SPEC>

0x20 - capture/compare enable register

§cnt: Reg<CNT_SPEC>

0x24 - counter

§psc: Reg<PSC_SPEC>

0x28 - prescaler

§arr: Reg<ARR_SPEC>

0x2c - auto-reload register

§rcr: Reg<RCR_SPEC>

0x30 - repetition counter register

§ccr1: Reg<CCR1_SPEC>

0x34 - capture/compare register 1

§ccr2: Reg<CCR2_SPEC>

0x38 - capture/compare register 2

§ccr3: Reg<CCR3_SPEC>

0x3c - capture/compare register 3

§ccr4: Reg<CCR4_SPEC>

0x40 - capture/compare register 4

§bdtr: Reg<BDTR_SPEC>

0x44 - break and dead-time register

§dcr: Reg<DCR_SPEC>

0x48 - DMA control register

§dmar: Reg<DMAR_SPEC>

0x4c - DMA address for full transfer

§or1: Reg<OR1_SPEC>

0x50 - option register 1

§ccmr3_output: Reg<CCMR3_OUTPUT_SPEC>

0x54 - capture/compare mode register 3

§ccr5: Reg<CCR5_SPEC>

0x58 - capture/compare register 5

§ccr6: Reg<CCR6_SPEC>

0x5c - capture/compare register 6

§af1: Reg<AF1_SPEC>

0x60 - alternate function option register 1

§af2: Reg<AF2_SPEC>

0x64 - Alternate function register 2

§tisel: Reg<TISEL_SPEC>

0x68 - timer input selection register

Implementations§

§

impl RegisterBlock

pub fn ccmr1_input(&self) -> &Reg<CCMR1_INPUT_SPEC>

0x18 - capture/compare mode register 1 (input mode)

pub fn ccmr1_output(&self) -> &Reg<CCMR1_OUTPUT_SPEC>

0x18 - capture/compare mode register 1 (output mode)

pub fn ccmr2_input(&self) -> &Reg<CCMR2_INPUT_SPEC>

0x1c - capture/compare mode register 2 (input mode)

pub fn ccmr2_output(&self) -> &Reg<CCMR2_OUTPUT_SPEC>

0x1c - capture/compare mode register 2 (output mode)

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