Struct stm32wlxx_hal::pac::usart1::cr1::W

pub struct W(/* private fields */);

Available on crate feature stm32wl5x_cm4 only.

Register CR1 writer

Implementations

impl W

pub fn rxffie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, RXFFIE_A, BitM, 31>

Bit 31 - RXFIFO Full interrupt enable

pub fn txfeie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, TXFEIE_A, BitM, 30>

Bit 30 - TXFIFO empty interrupt enable

pub fn fifoen(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, FIFOEN_A, BitM, 29>

Bit 29 - FIFO mode enable

pub fn m1(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, M1_A, BitM, 28>

Bit 28 - Word length

pub fn eobie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, EOBIE_A, BitM, 27>

Bit 27 - End of Block interrupt enable

pub fn rtoie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, RTOIE_A, BitM, 26>

Bit 26 - Receiver timeout interrupt enable

pub fn over8(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, OVER8_A, BitM, 15>

Bit 15 - Oversampling mode

pub fn cmie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, CMIE_A, BitM, 14>

Bit 14 - Character match interrupt enable

pub fn mme(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, MME_A, BitM, 13>

Bit 13 - Mute mode enable

pub fn m0(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, M0_A, BitM, 12>

Bit 12 - Word length

pub fn wake(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, WAKE_A, BitM, 11>

Bit 11 - Receiver wakeup method

pub fn pce(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, PCE_A, BitM, 10>

Bit 10 - Parity control enable

pub fn ps(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, PS_A, BitM, 9>

Bit 9 - Parity selection

pub fn peie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, PEIE_A, BitM, 8>

Bit 8 - PE interrupt enable

pub fn txeie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, TXEIE_A, BitM, 7>

Bit 7 - Transmit data register empty/TXFIFO not full interrupt enable

pub fn tcie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, TCIE_A, BitM, 6>

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, RXNEIE_A, BitM, 5>

Bit 5 - Receive data register not empty/RXFIFO not empty interrupt enable

pub fn idleie(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, IDLEIE_A, BitM, 4>

Bit 4 - IDLE interrupt enable

pub fn te(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, TE_A, BitM, 3>

Bit 3 - Transmitter enable

pub fn re(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, RE_A, BitM, 2>

Bit 2 - Receiver enable

pub fn uesm(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, UESM_A, BitM, 1>

Bit 1 - USART enable in low-power mode

pub fn ue(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, UE_A, BitM, 0>

Bit 0 - USART enable

pub fn deat(&mut self) -> FieldWriterRaw<'_, u32, CR1_SPEC, u8, u8, Safe, 5, 21>

Bits 21:25 - Driver Enable assertion time

pub fn dedt(&mut self) -> FieldWriterRaw<'_, u32, CR1_SPEC, u8, u8, Safe, 5, 16>

Bits 16:20 - Driver Enable deassertion time

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<CR1_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<CR1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<CR1_SPEC>> for W

fn from(writer: W<CR1_SPEC>) -> W

Converts to this type from the input type.