Struct stm32wlxx_hal::pac::usart1::cr3::W
pub struct W(/* private fields */);
stm32wl5x_cm4
only.Expand description
Register CR3
writer
Implementations§
§impl W
impl W
pub fn txftcfg(
&mut self
) -> FieldWriterRaw<'_, u32, CR3_SPEC, u8, TXFTCFG_A, Unsafe, 3, 29>
pub fn txftcfg( &mut self ) -> FieldWriterRaw<'_, u32, CR3_SPEC, u8, TXFTCFG_A, Unsafe, 3, 29>
Bits 29:31 - TXFIFO threshold configuration
pub fn rxftie(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, RXFTIE_A, BitM, 28>
pub fn rxftie(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, RXFTIE_A, BitM, 28>
Bit 28 - RXFIFO threshold interrupt enable
pub fn rxftcfg(
&mut self
) -> FieldWriterRaw<'_, u32, CR3_SPEC, u8, RXFTCFG_A, Unsafe, 3, 25>
pub fn rxftcfg( &mut self ) -> FieldWriterRaw<'_, u32, CR3_SPEC, u8, RXFTCFG_A, Unsafe, 3, 25>
Bits 25:27 - Receive FIFO threshold configuration
pub fn tcbgtie(
&mut self
) -> BitWriterRaw<'_, u32, CR3_SPEC, TCBGTIE_A, BitM, 24>
pub fn tcbgtie( &mut self ) -> BitWriterRaw<'_, u32, CR3_SPEC, TCBGTIE_A, BitM, 24>
Bit 24 - Transmission Complete before guard time, interrupt enable
pub fn txftie(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, TXFTIE_A, BitM, 23>
pub fn txftie(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, TXFTIE_A, BitM, 23>
Bit 23 - TXFIFO threshold interrupt enable
pub fn wufie(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, WUFIE_A, BitM, 22>
pub fn wufie(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, WUFIE_A, BitM, 22>
Bit 22 - Wakeup from low-power mode interrupt enable
pub fn wus(
&mut self
) -> FieldWriterRaw<'_, u32, CR3_SPEC, u8, WUS_A, Unsafe, 2, 20>
pub fn wus( &mut self ) -> FieldWriterRaw<'_, u32, CR3_SPEC, u8, WUS_A, Unsafe, 2, 20>
Bits 20:21 - Wakeup from low-power mode interrupt flag selection
pub fn scarcnt(
&mut self
) -> FieldWriterRaw<'_, u32, CR3_SPEC, u8, u8, Safe, 3, 17>
pub fn scarcnt( &mut self ) -> FieldWriterRaw<'_, u32, CR3_SPEC, u8, u8, Safe, 3, 17>
Bits 17:19 - Smartcard auto-retry count
pub fn dep(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, DEP_A, BitM, 15>
pub fn dep(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, DEP_A, BitM, 15>
Bit 15 - Driver enable polarity selection
pub fn dem(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, DEM_A, BitM, 14>
pub fn dem(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, DEM_A, BitM, 14>
Bit 14 - Driver enable mode
pub fn ddre(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, DDRE_A, BitM, 13>
pub fn ddre(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, DDRE_A, BitM, 13>
Bit 13 - DMA Disable on Reception Error
pub fn ovrdis(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, OVRDIS_A, BitM, 12>
pub fn ovrdis(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, OVRDIS_A, BitM, 12>
Bit 12 - OVRDIS: Overrun Disable
pub fn onebit(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, ONEBIT_A, BitM, 11>
pub fn onebit(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, ONEBIT_A, BitM, 11>
Bit 11 - One sample bit method enable
pub fn ctsie(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, CTSIE_A, BitM, 10>
pub fn ctsie(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, CTSIE_A, BitM, 10>
Bit 10 - CTS interrupt enable
pub fn dmat(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, DMAT_A, BitM, 7>
pub fn dmat(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, DMAT_A, BitM, 7>
Bit 7 - DMA enable transmitter
pub fn dmar(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, DMAR_A, BitM, 6>
pub fn dmar(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, DMAR_A, BitM, 6>
Bit 6 - DMA enable receiver
pub fn scen(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, SCEN_A, BitM, 5>
pub fn scen(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, SCEN_A, BitM, 5>
Bit 5 - Smartcard mode enable
pub fn nack(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, NACK_A, BitM, 4>
pub fn nack(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, NACK_A, BitM, 4>
Bit 4 - Smartcard NACK enable
pub fn hdsel(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, HDSEL_A, BitM, 3>
pub fn hdsel(&mut self) -> BitWriterRaw<'_, u32, CR3_SPEC, HDSEL_A, BitM, 3>
Bit 3 - Half-duplex selection
Methods from Deref<Target = W<CR3_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.