Struct stm32wlxx_hal::pac::hsem::c1misr::C1MISR_SPEC

pub struct C1MISR_SPEC;
Available on crate feature stm32wl5x_cm4 only.
Expand description

HSEM Masked interrupt status register

This register you can read. See API.

For information about available fields see c1misr module

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impl Readable for C1MISR_SPEC

read() method returns c1misr::R reader structure

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type Reader = R

Result from a call to read and argument to modify.
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impl RegisterSpec for C1MISR_SPEC

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type Ux = u32

Raw register type (u8, u16, u32, …).
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impl Resettable for C1MISR_SPEC

reset() method sets C1MISR to value 0

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fn reset_value() -> <C1MISR_SPEC as RegisterSpec>::Ux

Reset value of the register.

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