Struct stm32wlxx_hal::pac::pwr::cr1::W
pub struct W(/* private fields */);
Available on crate feature
stm32wl5x_cm4
only.Expand description
Register CR1
writer
Implementations§
§impl W
impl W
pub fn vos(
&mut self
) -> FieldWriterRaw<'_, u32, CR1_SPEC, u8, VOS_A, Unsafe, 2, 9>
pub fn vos( &mut self ) -> FieldWriterRaw<'_, u32, CR1_SPEC, u8, VOS_A, Unsafe, 2, 9>
Bits 9:10 - Voltage scaling range selection
pub fn dbp(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, DBP_A, BitM, 8>
pub fn dbp(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, DBP_A, BitM, 8>
Bit 8 - Disable backup domain write protection
pub fn fpds(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, FPDS_A, BitM, 5>
pub fn fpds(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, FPDS_A, BitM, 5>
Bit 5 - Flash memory power down mode during LPSleep for CPU1
pub fn fpdr(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, FPDR_A, BitM, 4>
pub fn fpdr(&mut self) -> BitWriterRaw<'_, u32, CR1_SPEC, FPDR_A, BitM, 4>
Bit 4 - Flash memory power down mode during LPRun for CPU1
pub fn subghzspinsssel(
&mut self
) -> BitWriterRaw<'_, u32, CR1_SPEC, SUBGHZSPINSSSEL_A, BitM, 3>
pub fn subghzspinsssel( &mut self ) -> BitWriterRaw<'_, u32, CR1_SPEC, SUBGHZSPINSSSEL_A, BitM, 3>
Bit 3 - sub-GHz SPI NSS source select
Methods from Deref<Target = W<CR1_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Trait Implementations§
Auto Trait Implementations§
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more