Struct stm32wlxx_hal::pac::rcc::c2ahb1smenr::C2AHB1SMENR_SPEC

pub struct C2AHB1SMENR_SPEC;

Available on crate feature stm32wl5x_cm4 only.

CPU2 AHB1 peripheral clocks enable in Sleep modes register [dual core device only]

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see c2ahb1smenr module

Trait Implementations

impl Readable for C2AHB1SMENR_SPEC

read() method returns c2ahb1smenr::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for C2AHB1SMENR_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for C2AHB1SMENR_SPEC

reset() method sets C2AHB1SMENR to value 0x1007

fn reset_value() -> <C2AHB1SMENR_SPEC as RegisterSpec>::Ux

Reset value of the register.

impl Writable for C2AHB1SMENR_SPEC

write(|w| ..) method takes c2ahb1smenr::W writer structure

type Writer = W

Writer type argument to write, et al.