Struct stm32wlxx_hal::pac::rcc::c2apb3enr::C2APB3ENR_SPEC

pub struct C2APB3ENR_SPEC;

Available on crate feature stm32wl5x_cm4 only.

CPU2 APB3 peripheral clock enable register [dual core device only]

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see c2apb3enr module

Trait Implementations

impl Readable for C2APB3ENR_SPEC

read() method returns c2apb3enr::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for C2APB3ENR_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for C2APB3ENR_SPEC

reset() method sets C2APB3ENR to value 0

fn reset_value() -> <C2APB3ENR_SPEC as RegisterSpec>::Ux

Reset value of the register.

impl Writable for C2APB3ENR_SPEC

write(|w| ..) method takes c2apb3enr::W writer structure

type Writer = W

Writer type argument to write, et al.