Struct stm32wlxx_hal::pac::rcc::cfgr::R

pub struct R(/* private fields */);

Available on crate feature stm32wl5x_cm4 only.

Register CFGR reader

Implementations

impl R

pub fn mcopre(&self) -> FieldReaderRaw<u8, MCOPRE_A>

Bits 28:30 - Microcontroller clock output prescaler

pub fn mcosel(&self) -> FieldReaderRaw<u8, MCOSEL_A>

Bits 24:27 - Microcontroller clock output

pub fn ppre2f(&self) -> BitReaderRaw<PPRE2F_A>

Bit 18 - PCLK2 prescaler flag (APB2)

pub fn ppre1f(&self) -> BitReaderRaw<PPRE1F_A>

Bit 17 - PCLK1 prescaler flag (APB1)

pub fn hpref(&self) -> BitReaderRaw<HPREF_A>

Bit 16 - HCLK1 prescaler flag (CPU1, AHB1, AHB2, and SRAM1)

pub fn stopwuck(&self) -> BitReaderRaw<STOPWUCK_A>

Bit 15 - Wakeup from Stop and CSS backup clock selection

pub fn ppre2(&self) -> FieldReaderRaw<u8, PPRE2_A>

Bits 11:13 - PCLK2 high-speed prescaler (APB2)

pub fn ppre1(&self) -> FieldReaderRaw<u8, PPRE1_A>

Bits 8:10 - PCLK1 low-speed prescaler (APB1)

pub fn hpre(&self) -> FieldReaderRaw<u8, HPRE_A>

Bits 4:7 - HCLK1 prescaler (CPU1, AHB1, AHB2, and SRAM1.)

pub fn sws(&self) -> FieldReaderRaw<u8, SWS_A>

Bits 2:3 - System clock switch status

pub fn sw(&self) -> FieldReaderRaw<u8, SW_A>

Bits 0:1 - System clock switch

Methods from Deref<Target = R<CFGR_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CFGR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<CFGR_SPEC>> for R

fn from(reader: R<CFGR_SPEC>) -> R

Converts to this type from the input type.