Struct stm32wlxx_hal::pac::rcc::pllcfgr::W
pub struct W(/* private fields */);
Available on crate feature
stm32wl5x_cm4
only.Expand description
Register PLLCFGR
writer
Implementations§
§impl W
impl W
pub fn pllr(
&mut self
) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, PLLQ_A, Unsafe, 3, 29>
pub fn pllr( &mut self ) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, PLLQ_A, Unsafe, 3, 29>
Bits 29:31 - Main PLL division factor for PLLRCLK
pub fn pllren(
&mut self
) -> BitWriterRaw<'_, u32, PLLCFGR_SPEC, PLLPEN_A, BitM, 28>
pub fn pllren( &mut self ) -> BitWriterRaw<'_, u32, PLLCFGR_SPEC, PLLPEN_A, BitM, 28>
Bit 28 - Main PLL PLLRCLK output enable
pub fn pllq(
&mut self
) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, PLLQ_A, Unsafe, 3, 25>
pub fn pllq( &mut self ) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, PLLQ_A, Unsafe, 3, 25>
Bits 25:27 - Main PLL division factor for PLLQCLK
pub fn pllqen(
&mut self
) -> BitWriterRaw<'_, u32, PLLCFGR_SPEC, PLLPEN_A, BitM, 24>
pub fn pllqen( &mut self ) -> BitWriterRaw<'_, u32, PLLCFGR_SPEC, PLLPEN_A, BitM, 24>
Bit 24 - Main PLL PLLQCLK output enable
pub fn pllp(
&mut self
) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, PLLP_A, Unsafe, 5, 17>
pub fn pllp( &mut self ) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, PLLP_A, Unsafe, 5, 17>
Bits 17:21 - Main PLL division factor for PLLPCLK.
pub fn pllpen(
&mut self
) -> BitWriterRaw<'_, u32, PLLCFGR_SPEC, PLLPEN_A, BitM, 16>
pub fn pllpen( &mut self ) -> BitWriterRaw<'_, u32, PLLCFGR_SPEC, PLLPEN_A, BitM, 16>
Bit 16 - Main PLL PLLPCLK output enable
pub fn plln(
&mut self
) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, u8, Unsafe, 7, 8>
pub fn plln( &mut self ) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, u8, Unsafe, 7, 8>
Bits 8:14 - Main PLL multiplication factor for VCO
pub fn pllm(
&mut self
) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, PLLM_A, Safe, 3, 4>
pub fn pllm( &mut self ) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, PLLM_A, Safe, 3, 4>
Bits 4:6 - Division factor for the main PLL input clock
pub fn pllsrc(
&mut self
) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, PLLSRC_A, Safe, 2, 0>
pub fn pllsrc( &mut self ) -> FieldWriterRaw<'_, u32, PLLCFGR_SPEC, u8, PLLSRC_A, Safe, 2, 0>
Bits 0:1 - Main PLL entry clock source
Methods from Deref<Target = W<PLLCFGR_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Trait Implementations§
§impl From<W<PLLCFGR_SPEC>> for W
impl From<W<PLLCFGR_SPEC>> for W
§fn from(writer: W<PLLCFGR_SPEC>) -> W
fn from(writer: W<PLLCFGR_SPEC>) -> W
Converts to this type from the input type.
Auto Trait Implementations§
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more