Struct stm32wlxx_hal::spi::Spi
source · pub struct Spi<SPI, SCK, MISO, MOSI> { /* private fields */ }
Expand description
SPI 1 and 2 driver.
Implementations§
source§impl<SCK, MISO, MOSI> Spi<SPI1, SCK, MISO, MOSI>
impl<SCK, MISO, MOSI> Spi<SPI1, SCK, MISO, MOSI>
sourcepub unsafe fn pulse_reset(rcc: &mut RCC)
pub unsafe fn pulse_reset(rcc: &mut RCC)
Reset the SPI.
Safety
- The SPI must not be in-use.
- You are responsible for setting up the SPI after a reset.
Example
use stm32wlxx_hal::{
pac,
spi::{NoMiso, NoMosi, NoSck, Spi},
};
let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();
unsafe { Spi::<pac::SPI1, NoSck, NoMiso, NoMosi>::pulse_reset(&mut dp.RCC) };
sourcepub unsafe fn disable_clock(rcc: &mut RCC)
pub unsafe fn disable_clock(rcc: &mut RCC)
Disable the SPI clock.
Safety
- You are responsible for ensuring the SPI is in a state where the clock can be disabled without entering an error state.
- You cannot use the SPI while the clock is disabled.
- You are responsible for re-enabling the clock before resuming use of the SPI.
- You are responsible for setting up anything that may have lost state while the clock was disabled.
Example
use stm32wlxx_hal::{
pac,
spi::{NoMiso, NoMosi, NoSck, Spi},
};
let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();
unsafe { Spi::<pac::SPI1, NoSck, NoMiso, NoMosi>::disable_clock(&mut dp.RCC) };
sourcepub fn enable_clock(rcc: &mut RCC)
pub fn enable_clock(rcc: &mut RCC)
Enable the SPI clock.
This is done for you in new_
constructors.
Example
use stm32wlxx_hal::{
pac,
spi::{NoMiso, NoMosi, NoSck, Spi},
};
let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();
Spi::<pac::SPI1, NoSck, NoMiso, NoMosi>::enable_clock(&mut dp.RCC);
source§impl<SCK, MISO, MOSI> Spi<SPI2, SCK, MISO, MOSI>
impl<SCK, MISO, MOSI> Spi<SPI2, SCK, MISO, MOSI>
sourcepub unsafe fn pulse_reset(rcc: &mut RCC)
pub unsafe fn pulse_reset(rcc: &mut RCC)
Reset the SPI.
Safety
- The SPI must not be in-use.
- You are responsible for setting up the SPI after a reset.
Example
use stm32wlxx_hal::{
pac,
spi::{NoMiso, NoMosi, NoSck, Spi},
};
let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();
unsafe { Spi::<pac::SPI2, NoSck, NoMiso, NoMosi>::pulse_reset(&mut dp.RCC) };
sourcepub unsafe fn disable_clock(rcc: &mut RCC)
pub unsafe fn disable_clock(rcc: &mut RCC)
Disable the SPI clock.
Safety
- You are responsible for ensuring the SPI is in a state where the clock can be disabled without entering an error state.
- You cannot use the SPI while the clock is disabled.
- You are responsible for re-enabling the clock before resuming use of the SPI.
- You are responsible for setting up anything that may have lost state while the clock was disabled.
Example
use stm32wlxx_hal::{
pac,
spi::{NoMiso, NoMosi, NoSck, Spi},
};
let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();
unsafe { Spi::<pac::SPI2, NoSck, NoMiso, NoMosi>::disable_clock(&mut dp.RCC) };
sourcepub fn enable_clock(rcc: &mut RCC)
pub fn enable_clock(rcc: &mut RCC)
Enable the SPI clock.
This is done for you in new_
constructors.
Example
use stm32wlxx_hal::{
pac,
spi::{NoMiso, NoMosi, NoSck, Spi},
};
let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();
Spi::<pac::SPI2, NoSck, NoMiso, NoMosi>::enable_clock(&mut dp.RCC);
source§impl<SCK, MISO, MOSI> Spi<SPI1, SCK, MISO, MOSI>where
SCK: Spi1Sck,
MISO: Spi1Miso,
MOSI: Spi1Mosi,
impl<SCK, MISO, MOSI> Spi<SPI1, SCK, MISO, MOSI>where SCK: Spi1Sck, MISO: Spi1Miso, MOSI: Spi1Mosi,
sourcepub fn new_spi1_full_duplex(
spi: SPI1,
pins: (SCK, MISO, MOSI),
mode: Mode,
div: BaudRate,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi1_full_duplex( spi: SPI1, pins: (SCK, MISO, MOSI), mode: Mode, div: BaudRate, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new full-duplex master.
Example
use stm32wlxx_hal::{
cortex_m,
gpio::PortA,
pac,
spi::{BaudRate::Div2, Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_full_duplex(
dp.SPI1,
(pa.a5, pa.a6, pa.a7),
MODE_0,
Div2,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MISO, MOSI> Spi<SPI2, SCK, MISO, MOSI>where
SCK: Spi2Sck,
MISO: Spi2Miso,
MOSI: Spi2Mosi,
impl<SCK, MISO, MOSI> Spi<SPI2, SCK, MISO, MOSI>where SCK: Spi2Sck, MISO: Spi2Miso, MOSI: Spi2Mosi,
sourcepub fn new_spi2_full_duplex(
spi: SPI2,
pins: (SCK, MISO, MOSI),
mode: Mode,
div: BaudRate,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi2_full_duplex( spi: SPI2, pins: (SCK, MISO, MOSI), mode: Mode, div: BaudRate, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new full-duplex master.
Example
use stm32wlxx_hal::{
cortex_m,
gpio::PortA,
pac,
spi::{BaudRate::Div2, Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_full_duplex(
dp.SPI1,
(pa.a5, pa.a6, pa.a7),
MODE_0,
Div2,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MISO, MOSI, MISODMA, MOSIDMA> Spi<SPI1, SCK, (MISO, MISODMA), (MOSI, MOSIDMA)>where
SCK: Spi1Sck,
MISO: Spi1Miso,
MOSI: Spi1Mosi,
MISODMA: DmaCh,
MOSIDMA: DmaCh,
impl<SCK, MISO, MOSI, MISODMA, MOSIDMA> Spi<SPI1, SCK, (MISO, MISODMA), (MOSI, MOSIDMA)>where SCK: Spi1Sck, MISO: Spi1Miso, MOSI: Spi1Mosi, MISODMA: DmaCh, MOSIDMA: DmaCh,
sourcepub fn new_spi1_full_duplex_dma(
spi: SPI1,
pins: (SCK, MISO, MOSI),
dmas: (MISODMA, MOSIDMA),
mode: Mode,
div: BaudRate,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi1_full_duplex_dma( spi: SPI1, pins: (SCK, MISO, MOSI), dmas: (MISODMA, MOSIDMA), mode: Mode, div: BaudRate, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new full-duplex master with DMA transfers.
Example
use stm32wlxx_hal::{
cortex_m,
dma::AllDma,
gpio::PortA,
pac,
spi::{BaudRate::Div2, Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let dma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_full_duplex_dma(
dp.SPI1,
(pa.a5, pa.a6, pa.a7),
(dma.d1.c1, dma.d1.c2),
MODE_0,
Div2,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MISO, MOSI, MISODMA, MOSIDMA> Spi<SPI2, SCK, (MISO, MISODMA), (MOSI, MOSIDMA)>where
SCK: Spi2Sck,
MISO: Spi2Miso,
MOSI: Spi2Mosi,
MISODMA: DmaCh,
MOSIDMA: DmaCh,
impl<SCK, MISO, MOSI, MISODMA, MOSIDMA> Spi<SPI2, SCK, (MISO, MISODMA), (MOSI, MOSIDMA)>where SCK: Spi2Sck, MISO: Spi2Miso, MOSI: Spi2Mosi, MISODMA: DmaCh, MOSIDMA: DmaCh,
sourcepub fn new_spi2_full_duplex_dma(
spi: SPI2,
pins: (SCK, MISO, MOSI),
dmas: (MISODMA, MOSIDMA),
mode: Mode,
div: BaudRate,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi2_full_duplex_dma( spi: SPI2, pins: (SCK, MISO, MOSI), dmas: (MISODMA, MOSIDMA), mode: Mode, div: BaudRate, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new full-duplex master with DMA transfers.
Example
use stm32wlxx_hal::{
cortex_m,
dma::AllDma,
gpio::PortA,
pac,
spi::{BaudRate::Div2, Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let dma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_full_duplex_dma(
dp.SPI1,
(pa.a5, pa.a6, pa.a7),
(dma.d1.c1, dma.d1.c2),
MODE_0,
Div2,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MOSI> Spi<SPI1, SCK, NoMiso, MOSI>where
SCK: Spi1Sck,
MOSI: Spi1Mosi,
impl<SCK, MOSI> Spi<SPI1, SCK, NoMiso, MOSI>where SCK: Spi1Sck, MOSI: Spi1Mosi,
sourcepub fn new_spi1_mosi_simplex(
spi: SPI1,
pins: (SCK, MOSI),
mode: Mode,
div: BaudRate,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi1_mosi_simplex( spi: SPI1, pins: (SCK, MOSI), mode: Mode, div: BaudRate, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new MOSI-simplex master.
Example
use stm32wlxx_hal::{
cortex_m,
gpio::PortA,
pac,
spi::{BaudRate::Div2, Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_mosi_simplex(
dp.SPI1,
(pa.a5, pa.a7),
MODE_0,
Div2,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MOSI> Spi<SPI2, SCK, NoMiso, MOSI>where
SCK: Spi2Sck,
MOSI: Spi2Mosi,
impl<SCK, MOSI> Spi<SPI2, SCK, NoMiso, MOSI>where SCK: Spi2Sck, MOSI: Spi2Mosi,
sourcepub fn new_spi2_mosi_simplex(
spi: SPI2,
pins: (SCK, MOSI),
mode: Mode,
div: BaudRate,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi2_mosi_simplex( spi: SPI2, pins: (SCK, MOSI), mode: Mode, div: BaudRate, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new MOSI-simplex master.
Example
use stm32wlxx_hal::{
cortex_m,
gpio::PortA,
pac,
spi::{BaudRate::Div2, Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_mosi_simplex(
dp.SPI1,
(pa.a5, pa.a7),
MODE_0,
Div2,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MOSI, MOSIDMA> Spi<SPI1, SCK, NoMiso, (MOSI, MOSIDMA)>where
SCK: Spi1Sck,
MOSI: Spi1Mosi,
MOSIDMA: DmaCh,
impl<SCK, MOSI, MOSIDMA> Spi<SPI1, SCK, NoMiso, (MOSI, MOSIDMA)>where SCK: Spi1Sck, MOSI: Spi1Mosi, MOSIDMA: DmaCh,
sourcepub fn new_spi1_mosi_simplex_dma(
spi: SPI1,
pins: (SCK, MOSI),
dma: MOSIDMA,
mode: Mode,
div: BaudRate,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi1_mosi_simplex_dma( spi: SPI1, pins: (SCK, MOSI), dma: MOSIDMA, mode: Mode, div: BaudRate, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new MOSI-simplex master with DMA transfers.
Example
use stm32wlxx_hal::{
cortex_m,
dma::AllDma,
gpio::PortA,
pac,
spi::{BaudRate::Div2, Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let dma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_mosi_simplex_dma(
dp.SPI1,
(pa.a5, pa.a7),
dma.d1.c1,
MODE_0,
Div2,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MOSI, MOSIDMA> Spi<SPI2, SCK, NoMiso, (MOSI, MOSIDMA)>where
SCK: Spi2Sck,
MOSI: Spi2Mosi,
MOSIDMA: DmaCh,
impl<SCK, MOSI, MOSIDMA> Spi<SPI2, SCK, NoMiso, (MOSI, MOSIDMA)>where SCK: Spi2Sck, MOSI: Spi2Mosi, MOSIDMA: DmaCh,
sourcepub fn new_spi2_mosi_simplex_dma(
spi: SPI2,
pins: (SCK, MOSI),
dma: MOSIDMA,
mode: Mode,
div: BaudRate,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi2_mosi_simplex_dma( spi: SPI2, pins: (SCK, MOSI), dma: MOSIDMA, mode: Mode, div: BaudRate, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new MOSI-simplex master with DMA transfers.
Example
use stm32wlxx_hal::{
cortex_m,
dma::AllDma,
gpio::PortA,
pac,
spi::{BaudRate::Div2, Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let dma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_mosi_simplex_dma(
dp.SPI1,
(pa.a5, pa.a7),
dma.d1.c1,
MODE_0,
Div2,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MISO> Spi<SPI1, SCK, MISO, NoMosi>where
SCK: Spi1Sck,
MISO: Spi1Miso,
impl<SCK, MISO> Spi<SPI1, SCK, MISO, NoMosi>where SCK: Spi1Sck, MISO: Spi1Miso,
sourcepub fn new_spi1_miso_simplex_slave(
spi: SPI1,
pins: (SCK, MISO),
mode: Mode,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi1_miso_simplex_slave( spi: SPI1, pins: (SCK, MISO), mode: Mode, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new MOSI-simplex slave.
Example
use stm32wlxx_hal::{
cortex_m,
gpio::PortA,
pac,
spi::{Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_miso_simplex_slave(
dp.SPI1,
(pa.a5, pa.a6),
MODE_0,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MISO> Spi<SPI2, SCK, MISO, NoMosi>where
SCK: Spi2Sck,
MISO: Spi2Miso,
impl<SCK, MISO> Spi<SPI2, SCK, MISO, NoMosi>where SCK: Spi2Sck, MISO: Spi2Miso,
sourcepub fn new_spi2_miso_simplex_slave(
spi: SPI2,
pins: (SCK, MISO),
mode: Mode,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi2_miso_simplex_slave( spi: SPI2, pins: (SCK, MISO), mode: Mode, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new MOSI-simplex slave.
Example
use stm32wlxx_hal::{
cortex_m,
gpio::PortA,
pac,
spi::{Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_miso_simplex_slave(
dp.SPI1,
(pa.a5, pa.a6),
MODE_0,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MISO, MISODMA> Spi<SPI1, SCK, (MISO, MISODMA), NoMosi>where
SCK: Spi1Sck,
MISO: Spi1Miso,
MISODMA: DmaCh,
impl<SCK, MISO, MISODMA> Spi<SPI1, SCK, (MISO, MISODMA), NoMosi>where SCK: Spi1Sck, MISO: Spi1Miso, MISODMA: DmaCh,
sourcepub fn new_spi1_miso_simplex_slave_dma(
spi: SPI1,
pins: (SCK, MISO),
dma: MISODMA,
mode: Mode,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi1_miso_simplex_slave_dma( spi: SPI1, pins: (SCK, MISO), dma: MISODMA, mode: Mode, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new MISO-simplex slave with DMA transfers.
Example
use stm32wlxx_hal::{
cortex_m,
dma::AllDma,
gpio::PortA,
pac,
spi::{Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let dma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_miso_simplex_slave_dma(
dp.SPI1,
(pa.a5, pa.a6),
dma.d1.c1,
MODE_0,
&mut dp.RCC,
cs,
)
});
source§impl<SCK, MISO, MISODMA> Spi<SPI2, SCK, (MISO, MISODMA), NoMosi>where
SCK: Spi2Sck,
MISO: Spi2Miso,
MISODMA: DmaCh,
impl<SCK, MISO, MISODMA> Spi<SPI2, SCK, (MISO, MISODMA), NoMosi>where SCK: Spi2Sck, MISO: Spi2Miso, MISODMA: DmaCh,
sourcepub fn new_spi2_miso_simplex_slave_dma(
spi: SPI2,
pins: (SCK, MISO),
dma: MISODMA,
mode: Mode,
rcc: &mut RCC,
cs: &CriticalSection
) -> Self
pub fn new_spi2_miso_simplex_slave_dma( spi: SPI2, pins: (SCK, MISO), dma: MISODMA, mode: Mode, rcc: &mut RCC, cs: &CriticalSection ) -> Self
Create a new MISO-simplex slave with DMA transfers.
Example
use stm32wlxx_hal::{
cortex_m,
dma::AllDma,
gpio::PortA,
pac,
spi::{Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let dma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_miso_simplex_slave_dma(
dp.SPI1,
(pa.a5, pa.a6),
dma.d1.c1,
MODE_0,
&mut dp.RCC,
cs,
)
});
source§impl<SPI, SCK, MISO, MOSI> Spi<SPI, SCK, MISO, MOSI>
impl<SPI, SCK, MISO, MOSI> Spi<SPI, SCK, MISO, MOSI>
sourcepub fn free(self) -> (SPI, SCK, MISO, MOSI)
pub fn free(self) -> (SPI, SCK, MISO, MOSI)
Free the SPI peripheral, pins, and DMA channel(s) from the driver.
Example
use stm32wlxx_hal::{
dma::AllDma,
gpio::PortA,
pac,
spi::{BaudRate::Div2, Spi, MODE_0},
};
let mut dp = pac::Peripherals::take().unwrap();
let dma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);
let pa = PortA::split(dp.GPIOA, &mut dp.RCC);
let spi = cortex_m::interrupt::free(|cs| {
Spi::new_spi1_full_duplex_dma(
dp.SPI1,
(pa.a5, pa.a6, pa.a7),
(dma.d1.c1, dma.d1.c2),
MODE_0,
Div2,
&mut dp.RCC,
cs,
)
});
// .. use spi
let (spi1, a5, (a6, d1c1), (a7, d1c2)) = spi.free();