Struct stm32wlxx_hal::uart::Uart2

pub struct Uart2<RX, TX> { /* private fields */ }

UART2 driver.

Implementations

impl Uart2<NoRx, NoTx>

pub fn new( uart: USART2, baud: u32, clk: Clk, rcc: &mut RCC ) -> Uart2<NoRx, NoTx>

Create a new UART driver from a UART peripheral.

This will enable clocks and reset the UART peripheral.

Example

use stm32wlxx_hal::{
    pac,
    uart::{self, NoRx, NoTx, Uart2},
};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

// enable the HSI16 source clock
dp.RCC.cr.modify(|_, w| w.hsion().set_bit());
while dp.RCC.cr.read().hsirdy().is_not_ready() {}

let uart: Uart2<NoRx, NoTx> = Uart2::new(dp.USART2, 115_200, uart::Clk::Hsi16, &mut dp.RCC);

impl<RX, TX> Uart2<RX, TX>

pub fn clock_hz(&self, rcc: &RCC) -> u32

Calculate the clock frequency.

Fractional frequencies will be rounded towards zero.

impl Uart2<NoRx, NoTx>

pub unsafe fn pulse_reset(rcc: &mut RCC)

Reset the UART.

Safety

1. The UART must not be in-use.
2. You are responsible for setting up the UART after a reset.

Example

See steal

impl Uart2<NoRx, NoTx>

pub fn enable_clock(rcc: &mut RCC)

Enable the UART clock.

This is done for you in new

Example

use stm32wlxx_hal::{pac, uart::LpUart};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();
LpUart::enable_clock(&mut dp.RCC);

pub unsafe fn disable_clock(rcc: &mut RCC)

Disable the UART clock.

Safety

1. You are responsible for ensuring the UART is in a state where the clock can be disabled without entering an error state.
2. You cannot use the UART while the clock is disabled.
3. You are responsible for re-enabling the clock before resuming use of the UART.
4. You are responsible for setting up anything that may have lost state while the clock was disabled.

impl Uart2<NoRx, NoTx>

pub unsafe fn steal() -> Uart2<NoRx, NoTx>

Steal the UART peripheral from whatever is currently using it.

This will not initialize the peripheral (unlike new).

Safety

1. Ensure that the code stealing the UART has exclusive access to the peripheral. Singleton checks are bypassed with this method.
2. You are responsible for setting up the UART correctly.

Example

use stm32wlxx_hal::{
    pac,
    uart::{LpUart, NoRx, NoTx},
};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

LpUart::enable_clock(&mut dp.RCC);
// safety:
// 1. Nothing else is using the LPUART in this code.
// 2. This code performs setup for the LPUART.
unsafe { LpUart::pulse_reset(&mut dp.RCC) };

// safety:
// 1. Nothing else is using the LPUART in this code.
// 2. The LPUART has been setup, clocks are enabled and the LPUART has been reset.
let mut lpuart: LpUart<NoRx, NoTx> = unsafe { LpUart::steal() };

impl<RX, TX> Uart2<RX, TX>

pub fn free(self) -> USART2

Free the UART peripheral from the driver.

Example

use stm32wlxx_hal::{
    pac,
    uart::{self, LpUart, NoRx, NoTx},
};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();
let lpuart: pac::LPUART = dp.LPUART;

let lpuart: LpUart<NoRx, NoTx> =
    LpUart::new(lpuart, 115_200, uart::Clk::Hsi16, &mut dp.RCC);
// ... use LPUART
let lpuart: pac::LPUART = lpuart.free();

impl<RX> Uart2<RX, NoTx>

pub fn enable_tx<TX: Uart2Tx>( self, tx: TX, cs: &CriticalSection ) -> Uart2<RX, TX>

Enable the UART transmitter.

Example

use stm32wlxx_hal::{
    cortex_m,
    gpio::{pins, PortB},
    pac,
    uart::{self, LpUart, NoRx},
};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

// enable the HSI16 source clock
dp.RCC.cr.modify(|_, w| w.hsion().set_bit());
while dp.RCC.cr.read().hsirdy().is_not_ready() {}

let gpiob: PortB = PortB::split(dp.GPIOB, &mut dp.RCC);
let uart: LpUart<NoRx, pins::B11> = cortex_m::interrupt::free(|cs| {
    LpUart::new(dp.LPUART, 115_200, uart::Clk::Hsi16, &mut dp.RCC)
        .enable_tx(gpiob.b11, cs)
});

impl<RX> Uart2<RX, NoTx>

pub fn enable_tx_dma<TxPin: Uart2Tx, TxDma: DmaCh>( self, tx: TxPin, tx_dma: TxDma, cs: &CriticalSection ) -> Uart2<RX, (TxPin, TxDma)>

Enable the UART transmitter with a DMA channel.

Example

use stm32wlxx_hal::{
    cortex_m,
    dma::{AllDma, Dma2Ch7},
    gpio::{pins, PortB},
    pac,
    uart::{self, LpUart, NoRx},
};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

// enable the HSI16 source clock
dp.RCC.cr.modify(|_, w| w.hsion().set_bit());
while dp.RCC.cr.read().hsirdy().is_not_ready() {}

let dma: AllDma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);
let gpiob: PortB = PortB::split(dp.GPIOB, &mut dp.RCC);
let uart: LpUart<NoRx, (pins::B11, Dma2Ch7)> = cortex_m::interrupt::free(|cs| {
    LpUart::new(dp.LPUART, 115_200, uart::Clk::Hsi16, &mut dp.RCC)
        .enable_tx_dma(gpiob.b11, dma.d2.c7, cs)
});

impl<RX, TX> Uart2<RX, TX>

pub fn disable_tx(self) -> (Uart2<RX, NoTx>, TX)

Disable the UART transmitter.

Example

use stm32wlxx_hal::{
    cortex_m,
    gpio::{pins, PortB},
    pac,
    uart::{self, LpUart, NoRx, NoTx},
};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

// enable the HSI16 source clock
dp.RCC.cr.modify(|_, w| w.hsion().set_bit());
while dp.RCC.cr.read().hsirdy().is_not_ready() {}

let gpiob: PortB = PortB::split(dp.GPIOB, &mut dp.RCC);
let uart: LpUart<NoRx, pins::B11> = cortex_m::interrupt::free(|cs| {
    LpUart::new(dp.LPUART, 115_200, uart::Clk::Hsi16, &mut dp.RCC)
        .enable_tx(gpiob.b11, cs)
});

let (uart, b11): (LpUart<NoRx, NoTx>, pins::B11) = uart.disable_tx();

impl<TX> Uart2<NoRx, TX>

pub fn enable_rx<RX: Uart2Rx>( self, rx: RX, cs: &CriticalSection ) -> Uart2<RX, TX>

Enable the UART receiver.

Example

use stm32wlxx_hal::{
    cortex_m,
    gpio::{pins, PortB},
    pac,
    uart::{self, LpUart, NoTx},
};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

// enable the HSI16 source clock
dp.RCC.cr.modify(|_, w| w.hsion().set_bit());
while dp.RCC.cr.read().hsirdy().is_not_ready() {}

let gpiob: PortB = PortB::split(dp.GPIOB, &mut dp.RCC);
let uart: LpUart<pins::B10, NoTx> = cortex_m::interrupt::free(|cs| {
    LpUart::new(dp.LPUART, 115_200, uart::Clk::Hsi16, &mut dp.RCC)
        .enable_rx(gpiob.b10, cs)
});

impl<TX> Uart2<NoRx, TX>

pub fn enable_rx_dma<RxPin: Uart2Rx, RxDma: DmaCh>( self, rx: RxPin, rx_dma: RxDma, cs: &CriticalSection ) -> Uart2<(RxPin, RxDma), TX>

Enable the UART receiver with a DMA channel.

Example

use stm32wlxx_hal::{
    dma::{AllDma, Dma2Ch2},
    gpio::{pins, PortB},
    pac,
    uart::{self, LpUart, NoTx},
};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

// enable the HSI16 source clock
dp.RCC.cr.modify(|_, w| w.hsion().set_bit());
while dp.RCC.cr.read().hsirdy().is_not_ready() {}

let dma: AllDma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);
let gpiob: PortB = PortB::split(dp.GPIOB, &mut dp.RCC);
let uart: LpUart<(pins::B10, Dma2Ch2), NoTx> = cortex_m::interrupt::free(|cs| {
    LpUart::new(dp.LPUART, 115_200, uart::Clk::Hsi16, &mut dp.RCC)
        .enable_rx_dma(gpiob.b10, dma.d2.c2, cs)
});

impl<RX, TX> Uart2<RX, TX>

pub fn disable_rx(self) -> (Uart2<NoRx, TX>, RX)

Disable the UART receiver.

Example

use stm32wlxx_hal::{
    gpio::{pins, PortB},
    pac,
    uart::{self, LpUart, NoRx, NoTx},
};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

// enable the HSI16 source clock
dp.RCC.cr.modify(|_, w| w.hsion().set_bit());
while dp.RCC.cr.read().hsirdy().is_not_ready() {}

let gpiob: PortB = PortB::split(dp.GPIOB, &mut dp.RCC);
let uart: LpUart<pins::B10, NoTx> = cortex_m::interrupt::free(|cs| {
    LpUart::new(dp.LPUART, 115_200, uart::Clk::Hsi16, &mut dp.RCC)
        .enable_rx(gpiob.b10, cs)
});

let (uart, b10): (LpUart<NoRx, NoTx>, pins::B10) = uart.disable_rx();

impl<RxPin, RxDma, TX> Uart2<(RxPin, RxDma), TX>where RxPin: Uart2Rx, RxDma: DmaCh,

pub fn bread_all(&mut self, buffer: &mut [u8]) -> Result<(), Error>

This is not an embedded-hal trait, it is added simply for parity with what exists on the TX side.

Trait Implementations

impl<RX: Debug, TX: Debug> Debug for Uart2<RX, TX>

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl<RX, TX> Write for Uart2<RX, TX>where Uart2<RX, TX>: Write<u8>,

fn write_str(&mut self, s: &str) -> Result

Writes a string slice into this writer, returning whether the write succeeded.

fn write_char(&mut self, c: char) -> Result<(), Error>

Writes a char into this writer, returning whether the write succeeded.

fn write_fmt(&mut self, args: Arguments<'_>) -> Result<(), Error>

Glue for usage of the write! macro with implementors of this trait.

impl<RX, TxPin, TxDma> Write<u8> for Uart2<RX, (TxPin, TxDma)>where TxPin: Uart2Tx, TxDma: DmaCh,

type Error = Error

The type of error that can occur when writing

fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error>

Writes a slice, blocking until everything has been written

fn bflush(&mut self) -> Result<(), Self::Error>

Block until the serial interface has sent all buffered words

impl<RX, TX> Read<u8> for Uart2<RX, TX>where RX: Uart2Rx,

type Error = Error

Read error

fn read(&mut self) -> Result<u8, Self::Error>

Reads a single word from the serial interface

impl<RX, TX> Write<u8> for Uart2<RX, TX>where TX: Uart2Tx,

type Error = Error

Write error

fn write(&mut self, word: u8) -> Result<(), Self::Error>

Writes a single word to the serial interface

fn flush(&mut self) -> Result<(), Self::Error>

Ensures that none of the previously written words are still buffered