Struct stm32wlxx_hal::subghz::SubGhz

pub struct SubGhz<MISO, MOSI> { /* private fields */ }

Sub-GHz radio peripheral.

Example

GFSK setup

use static_assertions as sa;
use stm32wlxx_hal::{
    dma::{AllDma, Dma1Ch1, Dma1Ch2},
    pac,
    subghz::{
        AddrComp, CalibrateImage, CfgIrq, CrcType, FallbackMode, FskBandwidth, FskBitrate,
        FskFdev, FskModParams, FskPulseShape, GenericPacketParams, HeaderType, Irq, Ocp,
        PaConfig, PacketType, PreambleDetection, RampTime, RegMode, RfFreq, StandbyClk, SubGhz,
        TcxoMode, TcxoTrim, Timeout, TxParams,
    },
};

const IRQ_CFG: CfgIrq = CfgIrq::new()
    .irq_enable_all(Irq::RxDone)
    .irq_enable_all(Irq::Timeout)
    .irq_enable_all(Irq::TxDone)
    .irq_enable_all(Irq::Err);

const PREAMBLE_LEN: u16 = 5 * 8;
const RF_FREQ: RfFreq = RfFreq::from_frequency(434_000_000);
const SYNC_WORD: [u8; 8] = [0x79, 0x80, 0x0C, 0xC0, 0x29, 0x95, 0xF8, 0x4A];
const SYNC_WORD_LEN: u8 = SYNC_WORD.len() as u8;
const SYNC_WORD_LEN_BITS: u8 = SYNC_WORD_LEN * 8;
const TX_BUF_OFFSET: u8 = 0;
const RX_BUF_OFFSET: u8 = 128;

const FSK_PACKET_PARAMS: GenericPacketParams = GenericPacketParams::new()
    .set_preamble_len(PREAMBLE_LEN)
    .set_preamble_detection(PreambleDetection::Bit8)
    .set_sync_word_len(SYNC_WORD_LEN_BITS)
    .set_addr_comp(AddrComp::Disabled)
    .set_header_type(HeaderType::Variable)
    .set_payload_len(128)
    .set_crc_type(CrcType::Byte2)
    .set_whitening_enable(true);

const FSK_MOD_PARAMS: FskModParams = FskModParams::new()
    .set_bitrate(FskBitrate::from_bps(20_000))
    .set_pulse_shape(FskPulseShape::Bt03)
    .set_bandwidth(FskBandwidth::Bw58)
    .set_fdev(FskFdev::from_hertz(10_000));

sa::const_assert!(FSK_MOD_PARAMS.is_valid_worst_case());

const PA_CONFIG: PaConfig = PaConfig::LP_10;
const TX_PARAMS: TxParams = TxParams::LP_10.set_ramp_time(RampTime::Micros40);

const TCXO_MODE: TcxoMode = TcxoMode::new()
    .set_tcxo_trim(TcxoTrim::Volts1pt7)
    .set_timeout(Timeout::from_millis_sat(10));

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

let dma: AllDma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);
let mut sg: SubGhz<Dma1Ch1, Dma1Ch2> =
    SubGhz::new_with_dma(dp.SPI3, dma.d1.c1, dma.d1.c2, &mut dp.RCC);

sg.set_standby(StandbyClk::Rc)?;
sg.set_tcxo_mode(&TCXO_MODE)?;
sg.set_tx_rx_fallback_mode(FallbackMode::Standby)?;
sg.set_regulator_mode(RegMode::Ldo)?;
sg.set_buffer_base_address(TX_BUF_OFFSET, RX_BUF_OFFSET)?;
sg.set_pa_config(&PA_CONFIG)?;
sg.set_pa_ocp(Ocp::Max60m)?;
sg.set_tx_params(&TX_PARAMS)?;
sg.set_packet_type(PacketType::Fsk)?;
sg.set_sync_word(&SYNC_WORD)?;
sg.set_fsk_mod_params(&FSK_MOD_PARAMS)?;
sg.set_packet_params(&FSK_PACKET_PARAMS)?;
sg.calibrate_image(CalibrateImage::ISM_430_440)?;
sg.set_rf_frequency(&RF_FREQ)?;
sg.set_irq_cfg(&IRQ_CFG)?;

Basic RX, requires setup.

use stm32wlxx_hal::subghz::{Irq, Timeout};

// if you have an RF switch put it into RX mode on this line
sg.set_rx(Timeout::DISABLED)?;

loop {
    let (status, irq_status) = sg.irq_status()?;
    sg.clear_irq_status(irq_status)?;

    if irq_status & Irq::RxDone.mask() != 0 {
        let (status, len, ptr) = sg.rx_buffer_status()?;
        // this is a little large for the stack
        let mut buf: [u8; 128] = [0; 128];
        let data: &mut [u8] = &mut buf[..usize::from(len)];
        sg.read_buffer(ptr, data)?;
        // ... do things with the data
        break;
    } else {
        // ... handle other IRQs
    }
}

Basic TX, requires setup.

use stm32wlxx_hal::subghz::{Irq, Timeout};

sg.write_buffer(TX_BUF_OFFSET, b"Hello, World!")?;
// if you have an RF switch put it into TX mode on this line
sg.set_tx(Timeout::from_millis_sat(100))?;

loop {
    let (status, irq_status) = sg.irq_status()?;
    sg.clear_irq_status(irq_status)?;

    if irq_status & Irq::TxDone.mask() != 0 {
        // nothing is required upon TX done
        // you may want to put the radio into RX mode after TX completion
        break;
    } else {
        // ... handle other IRQs
    }
}

Implementations

impl<MISO, MOSI> SubGhz<MISO, MOSI>

pub unsafe fn disable_spi_clock(rcc: &mut RCC)

Disable the SPI3 (SubGHz SPI) clock.

Safety

1. You are responsible for ensuring the SPI bus is in a state where the clock can be disabled without entering an error state.
2. You cannot use the SPI bus while the clock is disabled.
3. You are responsible for re-enabling the clock before resuming use of the SPI bus.
4. You are responsible for setting up anything that may have lost state while the clock was disabled.

pub fn enable_spi_clock(rcc: &mut RCC)

Enable the SPI3 (SubGHz SPI) clock.

pub fn free(self) -> (SPI3, MISO, MOSI)

Free the SPI3 peripheral and DMA channels from the SubGhz driver.

Example

use stm32wlxx_hal::{pac, subghz::SubGhz};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();
let sg = SubGhz::new(dp.SPI3, &mut dp.RCC);
let (spi, _, _) = sg.free();

impl SubGhz<SgMiso, SgMosi>

pub fn new(spi: SPI3, rcc: &mut RCC) -> SubGhz<SgMiso, SgMosi>

Create a new sub-GHz radio driver from a peripheral.

This will reset the radio and the SPI bus, and enable the peripheral clock.

Example

use stm32wlxx_hal::{pac, subghz::SubGhz};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();
let sg = SubGhz::new(dp.SPI3, &mut dp.RCC);

pub unsafe fn new_no_reset(spi: SPI3, rcc: &mut RCC) -> SubGhz<SgMiso, SgMosi>

Create a new sub-GHz radio driver from a peripheral.

Same as new, but without a reset. This is useful when waking up from standby to handle a radio interrupt.

Safety

This will not reset the radio, the radio will be in an unknown state when constructed with this method.

Example

use stm32wlxx_hal::{pac, subghz::SubGhz};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

let sg = unsafe { SubGhz::new_no_reset(dp.SPI3, &mut dp.RCC) };

pub unsafe fn steal() -> SubGhz<SgMiso, SgMosi>

Steal the SubGHz peripheral from whatever is currently using it.

This will not initialize the SPI bus (unlike new).

Safety

This will create a new SPI3 peripheral, bypassing the singleton checks that normally occur. You are responsible for ensuring that the radio has exclusive access to these peripherals.

Example

use stm32wlxx_hal::subghz::SubGhz;

// ... setup happens here

let sg = unsafe { SubGhz::steal() };

impl<MISO: DmaCh, MOSI: DmaCh> SubGhz<MISO, MOSI>

pub fn new_with_dma( spi: SPI3, miso_dma: MISO, mosi_dma: MOSI, rcc: &mut RCC ) -> Self

Create a new sub-GHz radio driver from a peripheral and two DMA channels.

This will reset the radio and the SPI bus, and enable the peripheral clock.

Example

use stm32wlxx_hal::{dma::AllDma, pac, subghz::SubGhz};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

let dma: AllDma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);

let sg = SubGhz::new_with_dma(dp.SPI3, dma.d1.c1, dma.d2.c1, &mut dp.RCC);

pub unsafe fn new_with_dma_no_reset( spi: SPI3, miso_dma: MISO, mosi_dma: MOSI, rcc: &mut RCC ) -> Self

Create a new sub-GHz radio driver from a peripheral and two DMA channels.

Same as new_with_dma, but without a reset. This is useful when waking up from standby to handle a radio interrupt.

Safety

This will not reset the radio, the radio will be in an unknown state when constructed with this method.

Example

use stm32wlxx_hal::{dma::AllDma, pac, subghz::SubGhz};

let mut dp: pac::Peripherals = pac::Peripherals::take().unwrap();

let dma: AllDma = AllDma::split(dp.DMAMUX, dp.DMA1, dp.DMA2, &mut dp.RCC);

let sg = unsafe { SubGhz::new_with_dma_no_reset(dp.SPI3, dma.d1.c1, dma.d2.c1, &mut dp.RCC) };

pub unsafe fn steal_with_dma(miso_dma: MISO, mosi_dma: MOSI) -> Self

Steal the SubGHz peripheral from whatever is currently using it.

This will not initialize the SPI bus, or the DMA channels (unlike new_with_dma).

Safety

This will create a new SPI3 peripheral, bypassing the singleton checks that normally occur. You are responsible for ensuring that the radio has exclusive access to these peripherals.

Example

use stm32wlxx_hal::{
    dma::{AllDma, Dma1Ch1, Dma2Ch1},
    subghz::SubGhz,
};

// ... setup happens here

let sg: SubGhz<Dma1Ch1, Dma2Ch1> = unsafe {
    let dma = AllDma::steal();
    SubGhz::steal_with_dma(dma.d1.c1, dma.d2.c1)
};

impl<MISO, MOSI> SubGhz<MISO, MOSI>where Spi3<MISO, MOSI>: Transfer<u8, Error = Error> + Write<u8, Error = Error>,

Synchronous buffer access commands

pub fn write_buffer(&mut self, offset: u8, data: &[u8]) -> Result<(), Error>

Write the radio buffer at the given offset.

pub fn read_buffer( &mut self, offset: u8, buf: &mut [u8] ) -> Result<Status, Error>

Read the radio buffer at the given offset.

The offset and length of a received packet is provided by rx_buffer_status.

impl<MISO, MOSI> SubGhz<MISO, MOSI>where Spi3<MISO, MOSI>: Transfer<u8, Error = Error> + Write<u8, Error = Error>,

Register access

pub fn pkt_ctrl(&mut self) -> Result<PktCtrl, Error>

Reads the PktCtrl register (GPKTCTL1A)

pub fn init_whitening(&mut self) -> Result<u8, Error>

Reads the Init Whitening register (GWHITEINIRL)

pub fn set_bit_sync(&mut self, bs: BitSync) -> Result<(), Error>

Set the LoRa bit synchronization.

pub fn set_pkt_ctrl(&mut self, pkt_ctrl: PktCtrl) -> Result<(), Error>

Set the generic packet control register.

pub fn set_init_whitening(&mut self, init: u8) -> Result<(), Error>

Set the initial value for generic packet whitening.

This sets the first 8 bits, the 9th bit is set with set_pkt_ctrl.

pub fn set_whitening_seed(&mut self, seed: u16) -> Result<(), Error>

Set the seed value for generic packet whitening.

pub fn set_crc_polynomial(&mut self, polynomial: u16) -> Result<(), Error>

Set the initial value for generic packet CRC polynomial.

pub fn set_initial_crc_polynomial( &mut self, polynomial: u16 ) -> Result<(), Error>

Set the generic packet CRC polynomial.

pub fn set_sync_word(&mut self, sync_word: &[u8; 8]) -> Result<(), Error>

Set the synchronization word registers.

pub fn set_lora_sync_word( &mut self, sync_word: LoRaSyncWord ) -> Result<(), Error>

Set the LoRa synchronization word registers.

pub fn set_rx_gain(&mut self, pmode: PMode) -> Result<(), Error>

Set the RX gain control.

pub fn set_pa_ocp(&mut self, ocp: Ocp) -> Result<(), Error>

Set the power amplifier over current protection.

pub fn restart_rtc(&mut self) -> Result<(), Error>

Restart the radio RTC.

This is used to workaround an erratum for set_rx_duty_cycle.

pub fn set_rtc_period(&mut self, period: Timeout) -> Result<(), Error>

Set the radio real-time-clock period.

This is used to workaround an erratum for set_rx_duty_cycle.

pub fn set_hse_in_trim(&mut self, trim: HseTrim) -> Result<(), Error>

Set the HSE32 crystal OSC_IN load capacitor trimming.

pub fn set_hse_out_trim(&mut self, trim: HseTrim) -> Result<(), Error>

Set the HSE32 crystal OSC_OUT load capacitor trimming.

pub fn set_smps_clock_det_en(&mut self, en: bool) -> Result<(), Error>

Set the SMPS clock detection enabled.

SMPS clock detection must be enabled fore enabling the SMPS.

pub fn set_pwr_ctrl(&mut self, pwr_ctrl: PwrCtrl) -> Result<(), Error>

Set the power current limiting.

pub fn set_smps_drv(&mut self, drv: SmpsDrv) -> Result<(), Error>

Set the maximum SMPS drive capability.

pub fn set_node_addr(&mut self, addr: u8) -> Result<(), Error>

Set the node address.

Used with GenericPacketParams::set_addr_comp to filter packets based on node address.

pub fn set_broadcast_addr(&mut self, addr: u8) -> Result<(), Error>

Set the broadcast address.

Used with GenericPacketParams::set_addr_comp to filter packets based on broadcast address.

pub fn set_addrs(&mut self, node: u8, broadcast: u8) -> Result<(), Error>

Set both the broadcast address and node address.

This is a combination of set_node_addr and set_broadcast_addr in a single SPI transfer.

impl<MISO, MOSI> SubGhz<MISO, MOSI>where Spi3<MISO, MOSI>: Transfer<u8, Error = Error> + Write<u8, Error = Error>,

Operating mode commands

pub unsafe fn set_sleep(&mut self, cfg: SleepCfg) -> Result<(), Error>

Put the radio into sleep mode.

This command is only accepted in standby mode. The cfg argument allows some optional functions to be maintained in sleep mode.

Safety

1. After the set_sleep command, the sub-GHz radio NSS must not go low for 500 μs. No reason is provided, the reference manual (RM0453 rev 2) simply says “you must”.
2. The radio cannot be used while in sleep mode.
3. The radio must be woken up with wakeup before resuming use.

Example

Put the radio into sleep mode.

use stm32wlxx_hal::{
    subghz::{wakeup, SleepCfg, StandbyClk},
    util::new_delay,
};

sg.set_standby(StandbyClk::Rc)?;
unsafe { sg.set_sleep(SleepCfg::default())? };
delay.delay_us(500);
unsafe { wakeup() };

pub fn set_standby(&mut self, standby_clk: StandbyClk) -> Result<(), Error>

Put the radio into standby mode.

pub fn set_fs(&mut self) -> Result<(), Error>

Put the subghz radio into frequency synthesis mode.

The RF-PLL frequency must be set with set_rf_frequency before using this command.

Check the datasheet for more information, this is a test command but I honestly do not see any use for it. Please update this description if you know more than I do.

pub fn set_tx(&mut self, timeout: Timeout) -> Result<(), Error>

Setup the sub-GHz radio for TX.

pub fn set_rx(&mut self, timeout: Timeout) -> Result<(), Error>

Setup the sub-GHz radio for RX.

pub fn set_rx_timeout_stop( &mut self, rx_timeout_stop: RxTimeoutStop ) -> Result<(), Error>

Allows selection of the receiver event which stops the RX timeout timer.

pub fn set_rx_duty_cycle( &mut self, rx_period: Timeout, sleep_period: Timeout ) -> Result<(), Error>

Put the radio in non-continuous RX mode.

This command must be sent in Standby mode. This command is only functional with FSK and LoRa packet type.

The following steps are performed:

1. Save sub-GHz radio configuration.
2. Enter Receive mode and listen for a preamble for the specified rx_period.
3. Upon the detection of a preamble, the rx_period timeout is stopped and restarted with the value 2 × rx_period + sleep_period. During this new period, the sub-GHz radio looks for the detection of a synchronization word when in (G)FSK modulation mode, or a header when in LoRa modulation mode.
4. If no packet is received during the listen period defined by 2 × rx_period + sleep_period, the sleep mode is entered for a duration of sleep_period. At the end of the receive period, the sub-GHz radio takes some time to save the context before starting the sleep period.
5. After the sleep period, a new listening period is automatically started. The sub-GHz radio restores the sub-GHz radio configuration and continuous with step 2.

The listening mode is terminated in one of the following cases:

• if a packet is received during the listening period: the sub-GHz radio issues a RxDone interrupt and enters standby mode.
• if set_standby is sent during the listening period or after the sub-GHz has been requested to exit sleep mode by sub-GHz radio SPI NSS

Erratum

When a preamble is detected the radio should restart the RX timeout with a value of 2 × rx_period + sleep_period. Instead the radio erroneously uses sleep_period.

To workaround this use restart_rtc and set_rtc_period to reprogram the radio timeout to 2 × rx_period + sleep_period.

Use code similar to this in the PreambleDetected interrupt handler.

use stm32wlxx_hal::subghz::Timeout;

let period: Timeout = rx_period
    .saturating_add(rx_period)
    .saturating_add(sleep_period);

sg.set_rtc_period(period)?;
sg.restart_rtc()?;

Please read the erratum for more details.

pub fn set_cad(&mut self) -> Result<(), Error>

Channel Activity Detection (CAD) with LoRa packets.

The channel activity detection (CAD) is a specific LoRa operation mode, where the sub-GHz radio searches for a LoRa radio signal. After the search is completed, the Standby mode is automatically entered, CAD is done and IRQ is generated. When a LoRa radio signal is detected, the CAD detected IRQ is also generated.

The length of the search must be configured with set_cad_params prior to calling set_cad.

pub fn set_tx_continuous_wave(&mut self) -> Result<(), Error>

Generate a continuous transmit tone at the RF-PLL frequency.

The sub-GHz radio remains in continuous transmit tone mode until a mode configuration command is received.

pub fn set_tx_continuous_preamble(&mut self) -> Result<(), Error>

Generate an infinite preamble at the RF-PLL frequency.

The preamble is an alternating 0s and 1s sequence in generic (G)FSK and (G)MSK modulations. The preamble is symbol 0 in LoRa modulation. The sub-GHz radio remains in infinite preamble mode until a mode configuration command is received.

impl<MISO, MOSI> SubGhz<MISO, MOSI>where Spi3<MISO, MOSI>: Transfer<u8, Error = Error> + Write<u8, Error = Error>,

Radio configuration commands

pub fn set_packet_type(&mut self, packet_type: PacketType) -> Result<(), Error>

Set the packet type (modulation scheme).

pub fn packet_type(&mut self) -> Result<Result<PacketType, u8>, Error>

Get the packet type.

pub fn set_rf_frequency(&mut self, freq: &RfFreq) -> Result<(), Error>

Set the radio carrier frequency.

pub fn set_tx_params(&mut self, params: &TxParams) -> Result<(), Error>

Set the transmit output power and the PA ramp-up time.

pub fn set_pa_config(&mut self, pa_config: &PaConfig) -> Result<(), Error>

Power amplifier configuration.

Used to customize the maximum output power and efficiency.

pub fn set_tx_rx_fallback_mode(&mut self, fm: FallbackMode) -> Result<(), Error>

Operating mode to enter after a successful packet transmission or packet reception.

pub fn set_cad_params(&mut self, params: &CadParams) -> Result<(), Error>

Set channel activity detection (CAD) parameters.

pub fn set_buffer_base_address(&mut self, tx: u8, rx: u8) -> Result<(), Error>

Set the data buffer base address for the packet handling in TX and RX.

There is a single buffer for both TX and RX. The buffer is not memory mapped, it is accessed via the read_buffer and write_buffer methods.

pub fn set_fsk_mod_params(&mut self, params: &FskModParams) -> Result<(), Error>

Set the (G)FSK modulation parameters.

pub fn set_lora_mod_params( &mut self, params: &LoRaModParams ) -> Result<(), Error>

Set the LoRa modulation parameters.

pub fn set_bpsk_mod_params( &mut self, params: &BpskModParams ) -> Result<(), Error>

Set the BPSK modulation parameters.

pub fn set_packet_params( &mut self, params: &GenericPacketParams ) -> Result<(), Error>

Set the generic (FSK) packet parameters.

pub fn set_bpsk_packet_params( &mut self, params: &BpskPacketParams ) -> Result<(), Error>

Set the BPSK packet parameters.

pub fn set_lora_packet_params( &mut self, params: &LoRaPacketParams ) -> Result<(), Error>

Set the LoRa packet parameters.

pub fn set_lora_symb_timeout(&mut self, n: u8) -> Result<(), Error>

Set the number of LoRa symbols to be received before starting the reception of a LoRa packet.

Packet reception is started after n + 1 symbols are detected.

impl<MISO, MOSI> SubGhz<MISO, MOSI>where Spi3<MISO, MOSI>: Transfer<u8, Error = Error> + Write<u8, Error = Error>,

Communication status and information commands

pub fn status(&mut self) -> Result<Status, Error>

Get the radio status.

The hardware (or documentation) appears to have many bugs where this will return reserved values. See this thread in the ST community for details: link

pub fn rx_buffer_status(&mut self) -> Result<(Status, u8, u8), Error>

Get the RX buffer status.

The return tuple is (status, payload_length, buffer_pointer).

pub fn fsk_packet_status(&mut self) -> Result<FskPacketStatus, Error>

Returns information on the last received (G)FSK packet.

pub fn lora_packet_status(&mut self) -> Result<LoRaPacketStatus, Error>

Returns information on the last received LoRa packet.

pub fn rssi_inst(&mut self) -> Result<(Status, Ratio<i16>), Error>

Get the instantaneous signal strength during packet reception.

The units are in dbm.

pub fn fsk_stats(&mut self) -> Result<Stats<FskStats>, Error>

(G)FSK packet stats.

pub fn lora_stats(&mut self) -> Result<Stats<LoRaStats>, Error>

LoRa packet stats.

pub fn reset_stats(&mut self) -> Result<(), Error>

Reset the stats as reported in lora_stats and fsk_stats.

impl<MISO, MOSI> SubGhz<MISO, MOSI>where Spi3<MISO, MOSI>: Transfer<u8, Error = Error> + Write<u8, Error = Error>,

IRQ commands

pub fn set_irq_cfg(&mut self, cfg: &CfgIrq) -> Result<(), Error>

Set the interrupt configuration.

pub fn irq_status(&mut self) -> Result<(Status, u16), Error>

Get the IRQ status.

pub fn clear_irq_status(&mut self, mask: u16) -> Result<(), Error>

Clear the IRQ status.

impl<MISO, MOSI> SubGhz<MISO, MOSI>where Spi3<MISO, MOSI>: Transfer<u8, Error = Error> + Write<u8, Error = Error>,

Miscellaneous commands

pub fn calibrate(&mut self, cal: u8) -> Result<(), Error>

Calibrate one or several blocks at any time when in standby mode.

pub fn calibrate_image(&mut self, cal: CalibrateImage) -> Result<(), Error>

Calibrate the image at the given frequencies.

Requires the radio to be in standby mode.

pub fn set_regulator_mode(&mut self, reg_mode: RegMode) -> Result<(), Error>

Set the radio power supply.

pub fn op_error(&mut self) -> Result<(Status, u16), Error>

Get the radio operational errors.

pub fn clear_error(&mut self) -> Result<(), Error>

Clear all errors as reported by op_error.

impl<MISO, MOSI> SubGhz<MISO, MOSI>where Spi3<MISO, MOSI>: Transfer<u8, Error = Error> + Write<u8, Error = Error>,

Set TCXO mode command

pub fn set_tcxo_mode(&mut self, tcxo_mode: &TcxoMode) -> Result<(), Error>

Set the TCXO trim and HSE32 ready timeout.

Trait Implementations

impl<MISO: Debug, MOSI: Debug> Debug for SubGhz<MISO, MOSI>

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.